Method of programming memory cells by breaking down antifuse elements
AssigneeSTMicroelectronics S.r.l.
InventorsBenjamin Duval, Fabrice Marinet
Life of this patent
Estimating the term…
Abstract
A method of programming a row of antifuse memory cells includes breaking down at least N antifuse elements in the memory cells. The breakdown includes the application of a breakdown voltage to the anode of each antifuse element. The antifuse elements are broken down sequentially by groups of P antifuse elements, with P being less than N and at least equal to 1. The antifuse elements of a same group simultaneously receive the breakdown voltage. The breakdown of a next group of antifuse elements immediately takes place after the breakdown of a previous group of antifuse elements.
Claims26
A method of programming a row of parallel memory cells, each memory cell comprising at least one antifuse element, the method comprising:
- breaking down at least N antifuse elements in the row of parallel memory cells by applying a breakdown voltage to an anode of each antifuse element;
- the N antifuse elements being sequentially broken down in groups of P antifuse elements, with P being less than N and at least equal to 1, the P antifuse elements of a same group simultaneously receiving the breakdown voltage, and the breakdown of a next group of P antifuse elements immediately taking place after the breakdown of a previous group of P antifuse elements.
An antifuse integrated circuit memory comprising:
- at least one row of parallel memory cells, each memory cell comprising at least one antifuse element and being programmable by breaking down said at least one antifuse element;
- and
- program means for programming said at least one row of parallel memory cells by applying a breakdown voltage to an anode of each antifuse element;
- said program means comprising means for sequentially applying the breakdown voltage to groups of P antifuse elements, with P being less than N and at least equal to 1, said antifuse elements of a same group simultaneously receiving the breakdown voltage, and the breakdown of a next group of antifuse elements immediately taking place after the breakdown of a previous group of antifuse elements.
A memory comprising:
- an array of memory cells arranged in rows and columns, each memory cell comprising at least one antifuse element and being programmable by breaking down said at least one antifuse element;
- program circuitry for programming at least one row of memory cells by applying a breakdown voltage to an anode of each antifuse element in the at least one row;
- said program circuitry sequentially applying the breakdown voltage to groups of P antifuse elements, with P being less than N and at least equal to 1, said antifuse elements of a same group simultaneously receiving the breakdown voltage;
- and
- detection circuitry for detecting the breakdown of said antifuse elements, and the breakdown of a next group of antifuse elements immediately taking place after the breakdown of a previous group of antifuse elements.
Dependencies are inferred from the claim text.