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US 6,788,584 B2Granted
Method, apparatus, and system to enhance negative voltage switching
AssigneeIntel Corporation
InventorsKerry D. Tedrow, Rajesh Sundaram
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Abstract
The present invention is in the field of flash memory. More particularly, embodiments of the present invention may provide a negative voltage for erasing when coupled to a memory cell to be erased and provide voltages to read or program when not coupled to a memory cell that is selected to be erased. Embodiments may also provide a high magnitude negative voltage to erase; a low impedance, low voltage current to read or program; and burn little to no current when not coupled to a memory cell that is selected to be erased.
Claims14
A system comprising:
- a memory array, and
- a memory array controller comprising
- a negative charge pump;
- a block controller coupled to the negative charge pump, comprising:
- a negative level shifter to switch an output between a read-mode voltage and an erase-mode voltage dependent upon a selection signal input;
- a positive voltage switch coupled to the negative level shifter;
- a bit line driver coupled to the positive voltage switch and coupled to said memory array;
- and
- a word line driver coupled to said positive voltage switch, coupled to the negative level shifter, and coupled to said memory array;
- and
- a second black controller to apply a signal to a second block within said memory array to read a memory cell of the second block substantially simultaneously with erasure of a first block within said memory array.
8 more elements
Dependencies are inferred from the claim text.