Back to results
US 6,788,572 B2Granted
Non-volatile multi-level semiconductor flash memory device and method of driving same
AssigneeHitachi, Ltd.
InventorsNaoki Yamada, Hiroshi Sato, Tetsuya Tsujikawa, Kazuyuki Miyazawa
Life of this patent
Estimating the term…
Abstract
In a nonvolatile semiconductor memory device in which a plurality of threshold values are set to store multi-level data in a memory cell, bits of multi-bit data are separately written into a memory cell according to an address signal or a control signal to effect the reading and erasing. Concretely, the memory array is so constituted that it can be accessed by three-dimensional address of X, Y and Z, and multi-bit data in the memory cell is discriminated by the Z-address.
Claims20
A nonvolatile memory comprising:
- a plurality of memory cells;
- and
- a plurality of word lines, each of which couples to corresponding ones of said memory cells,
- wherein said nonvolatile memory is capable of receiving a plurality of commands which includes a write command,
- wherein said nonvolatile memory is capable of receiving write address information and write data with said write command,
- wherein, when said nonvolatile memory receives said write command with a first address information as said write address information and first data, said nonvolatile memory selects a first word line according to said first address information, and stores said first data to said memory cells coupled to said first word line, and
- wherein, when said nonvolatile memory receives said write command with a second address information as said write address information and second data, said nonvolatile memory selects said first word tine according to said second address information, and stores said second data to said memory cells coupled to said first word line.
4 more elements
A nonvolatile memory comprising:
- a plurality of memory cells;
- and
- a plurality of word lines, each of which couples to corresponding ones of said memory cells,
- wherein said nonvolatile memory is capable of receiving a plurality of commands which includes a write command,
- wherein said nonvolatile memory is capable of receiving write address information and write data with said write command,
- wherein, when said nonvolatile memory receives said write command with a first address information as said write address information and first data, said nonvolatile memory selects a first word line according to said first address information, applies a write voltage to said first word line, stores said first data to said memory cells coupled to said first word line, and completes a first operation in response to said write command with said first address information, and
- wherein, when said nonvolatile memory receives said write command with a second address information as said write address information and second data, said nonvolatile memory selects said first word line according to said second address information, applies said write voltage to said first word line, stores said second data to said memory cells coupled to said first word line, which memory cells are already stored with said first data, and completes a second operation in response to said write command with said second address information.
4 more elements
Dependencies are inferred from the claim text.