Synchronous timing for interpolated timing recovery
AssigneeInfineon Technologies North America Corp.
InventorsJonathan Ashley, Matthias Driller
Life of this patent
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Abstract
A phase error estimate value between an actual interpolated sample time and an ideal interpolated sample time of an analog signal is selected by circuitry based on a quotient (z2−z0)/(z3−z1), where z0, z1, z2, and z3 are four successive synchronous samples of the analog signal. A sign of the phase error estimate value is selected by circuitry based on a comparison of predetermined differences between the four successive synchronous samples. The phase error estimate value can be adjusted by circuitry when an absolute value of the phase error estimate value exceeds a predetermined threshold and a closest sampling phase according to a difference between (z2−z0) and (z3−z1) differs from a phase predicted by a hysteresis state.
Claims17
A timing error calculation unit for determining a phase error estimate value between an actual interpolated sample time and an ideal interpolated sample time of an analog signal, the timing error calculation unit comprising:
- circuitry configured to select the phase error estimate value stored in a lookup table based on a quotient (z2−z0)/(z3−z1), where z0, z1, z2, and z3 are four successive synchronous samples of the analog signal,
- and where each of the four successive synchronous samples z0, z1, z2, and z3 is an interpolated value based on asynchronous samples of the analog signal.
A timing error calculation unit for determining a phase error estimate value between an actual interpolated sample time and an ideal interpolated sample time of an analog signal, the timing error calculation unit comprising:
- circuitry configured to select the phase error estimate value stored in a lookup table based on a quotient (z2−z0)/(z3−z1) where z0, z1, z2, and z3 are four successive synchronous samples of the analog signal;
- a comparator to compare values of predetermined differences between the four successive synchronous values z0, z1, z2, and z3;
- and
- circuitry configured to determine a sign of the phase error estimate value based on the comparison of the predetermined differences between the four successive synchronous samples z0, z1, z2, and z3.
An interpolated timing recovery unit for digitally resampling a stream of asynchronous samples of an analog signal, the interpolated timing recovery unit comprising:
- a timing error calculation unit configured to determine a phase error estimate value between an actual interpolated sample time and an ideal interpolated sample time in a lookup table based on a quotient (z2−z0)/(z3−z1), where z0, z1, z2, and z3 are four successive synchronous samples of the analog signal;
- and
- a loop filter configured to filter the estimated phase error and generate a frequency offset signal at an output of the loop filter that settles to a value proportional to a frequency difference between frequencies of synchronous samples of the analog signal and the asynchronous samples of the analog signal.
A sampled amplitude read channel, comprising:
- an interpolated timing recovery unit, the interpolated timing recovery unit including,
- a timing error calculation unit configured to determine a phase error estimate value between an actual interpolated sample time and an ideal interpolated sample time of an analog signal in a lookup table based on a quotient (z2−z0)/(z3−z1), where z0, z1, z2, and z3 are four successive synchronous samples of a signal from a magnetic recording channel,
- and where each of the four successive synchronous samples z0, z1, z2, and z3 is an interpolated value based on asynchronous samples of the analog signal.
A method for determining a phase error estimate value between an actual interpolated sample time and an ideal interpolated sample time of an analog signal, the timing error calculation unit comprising:
- selecting the phase error estimate value stored in a lookup table based on a quotient (z2−z0)/(z3−z1), where z0, z1, z2, and z3 are four successive synchronous samples of the analog signal,
- and where each of the four successive synchronous samples z0, z1, z2, and z3 is an interpolated value based on asynchronous samples of the analog signal.
A method for determining a phase error estimate value between an actual interpolated sample time and an ideal interpolated sample time of an analog signal, the timing error calculation unit comprising:
- selecting the phase error estimate value stored in a lookup table based on a quotient (z2−z0)/(z3−z1), where z0, z1, z2, and z3 are four successive synchronous samples of the analog signal;
- comparing values of predetermined differences between the four successive synchronous values z0, z1, z2, and z3;
- and
- determining a sign of the phase error estimate value based on the comparison of the predetermined differences between the four successive synchronous samples z0, z1, z2, and z3.
A timing error calculation unit for determining a plurality of successive phase error estimate values Δτi between an actual interpolated sample time and an ideal interpolated sample time of an analog signal, the timing error calculation unit comprising:
- circuitry configured to select a plurality of successive phase error estimate values Δτi stored in a lookup table based on a quotient (zi+2−zi)/(zi+3−zi+1), where zi, zi+1, zi+2, and zi+3 are four successive synchronous samples of the analog signal.
Dependencies are inferred from the claim text.