Method and apparatus for Viterbi detector state metric re-normalization

A Viterbi detector having a predetermined number of states for conducting maximum likelihood sequence estimation for a predetermined stream of binary data, wherein the Viterbi detector stores a state metric value and a branch metric value for each state, and wherein the Viterbi detector implements a trellis diagram, the Viterbi detector comprising:

• a branch metric unit which receives the stream of binary data, determines a branch metric value for each state at a time k+1, and outputs the branch metric value for time k+1;
• and
• an adding unit which receives the branch metric value for time k+1 and adds the branch metric value to a state metric value for time k for each state, wherein the state metric value is represented by a number of bits (g+h′), wherein g is the number of bits needed to represent the branch metric value, wherein h′ is the additional number of bits needed to represent the state metric value, and wherein the additional number of bits (h′) is less than the additional number of bits (h) determined using the following inequality:
• 2h−1−h ≧K−1, wherein K represents the constraint length of the trellis diagram.

A read/write channel for a hard disk drive, comprising:

• a write channel which receives a digital signal from a controller and outputs an analog signal to a pre-amplifier;
• and
• a read channel which receives an analog signal from the pre-amplifiers and outputs a digital signal to the controller, the read channel comprising a Viterbi detector, wherein the Viterbi detector implements a trellis diagram and has a predetermined number of states for conducting maximum likelihood sequence estimation for a predetermined stream of binary data, the Viterbi detector comprising:
• a branch metric unit which receives the stream of binary data, determines a branch metric value for each state at a time k+1, and outputs the branch metric value for time k+1;
• and
• an adding unit which receives the branch metric value for time k+1 and adds the branch metric value to a state metric value for time k for each state, wherein the state metric value is represented by a number of bits (g+h′), wherein g is the number of bits needed to represent the branch metric value, wherein h′ is the additional number of bits needed to represent the state metric value, and wherein the additional number of bits (h′) is less than the additional number of bits (h) determined using the following inequality:
• 2h−1−h≧K−1, wherein K represents the constraint length of the trellis diagram.