Clock-generating circuit and image-forming apparatus having a function of canceling F-theta property errors

An image-forming apparatus, comprising:

• an image-forming section that includes an optical-writing section to form an image;
• and
• a circuit for generating dot clock pulses for driving a light-emitting element employed in said optical-writing section included in said image-forming section;
• wherein said circuit includes:
• an index sensor to detect a light-beam, which is emitted from said light-emitting element and is deflected for scanning by a light-scanning device employed in said optical-writing section, and to output an index signal when said index sensor detects said light-beam at an end portion of a main-scanning region scanned by said light-beam;
• a delay-chain section to generate a plurality of delayed-clock pulses by delaying clock-pulses, outputted from a reference oscillator, in slightly different delay times;
• a synchronized clock pulse detecting section to select synchronized delayed-clock pulses, which are synchronized with said index signal, out of said plurality of delayed clock pulses generated in said delay-chain section, and to output a number of delay-stages, which is derived from said synchronized delayed-clock pulses, as synchronizing information;
• a table memory to storefθ property error information, which represents afθ property error of afθ lens employed in said optical-writing section;
• a delayed-clock switching section to generate a select signal, for selecting a specific delayed-clock pulse, having a phase suitable for compensating for said fθ property error of said fθ lens employed in said optical-writing section, out of said plurality of delayed-clock pulses, based on said synchronized delayed-clock pulses and said synchronizing information outputted from said synchronized clock pulse detecting section and said fθ property error information stored in said table memory;
• and
• a selector to select said specific delayed-clock pulse out of said plurality of delayed-clock pulses in response to said select signal generated by said delayed-clock switching section;
• and
• wherein said image-forming section performs an image-forming operation based on clock signals outputted from said selector.