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US 6,788,141 B2Granted
Power amplifier circuitry and method
AssigneeSilicon Laboratories Inc.
InventorsSusanne A. Paul, Timothy J. Dupuis
Life of this patent
Estimating the term…
Abstract
A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.
Claims53
A power amplifier comprising:
- a first switching device connected between a first supply voltage and a first output node;
- a second switching device connected between a second supply voltage and a second output node;
- an inductance connected between the first and second output nodes;
- and
- a first capacitor coupled to the first output node, wherein the first capacitor is provided by the input capacitance of a thud switching device.
2 more elements
A method of reducing the peak output voltage of an amplifier comprising the steps of:
- providing an inductor having first and second terminals;
- providing a first switching device connected to the first terminal of the inductor and to a first supply voltage;
- providing a second switching device connected to the second terminal of the inductor and a second supply voltage;
- applying a voltage between the first and second terminals of the inductor during a first portion of a clock cycle by turning on the first and second switching devices;
- turning off the first and second switching devices during a second portion of the clock cycle;
- and
- driving the first and second switching devices such that the switching devices are turned on and off simultaneously.
4 more elements
A power amplifier comprising:
- a first switching device connected between a first supply voltage and a first output node;
- a second switching device connected between a second supply voltage and a second output node;
- an inductance connected between the first and second output nodes;
- and
- a transformation network coupled to the first and second output nodes, wherein the transformation network further comprises a capacitor coupled to the first output node and a third node, an inductor coupled to the second Output node and the third node, and a load coupled to the third node.
2 more elements
A power amplifier comprising:
- a first switching device connected between a first supply voltage and a first output node;
- a second switching device connected between a second supply voltage and a second output node;
- an inductance connected between the first and second output nodes;
- and
- a preamplifier connected to the power amplifier, the preamplifier further comprising:
- a third switching device connected between said first supply voltage and a third node and coupled to the input of the first switching device;
- a fourth switching device connected between said second supply voltage and a fourth node and coupled to the input of the second switching device;
- and
- a second inductor coupled between the third and fourth nodes.
6 more elements
A power amplifier comprising:
- a first switching device connected between a first supply voltage and a first output node;
- a second switching device connected between a second supply voltage and a second output node;
- an inductance connected between the first and second output nodes;
- and
- one or more inductors coupled between the first output node and a third supply voltage.
2 more elements
A method of reducing the peak output voltage of an amplifier comprising the steps of:
- providing an inductor having first and second terminals;
- providing a first switching device connected to the first terminal of the inductor and to a first supply voltage;
- providing a second switching device connected to the second terminal of the inductor and a second supply voltage;
- applying a voltage between the first and second terminal of the inductor during a first portion of a clock cycle by turning on the first and second switching devices;
- turning off the first and second switching devices during a second portion of the clock cycle;
- and
- driving the first and second switching devices by repeatedly turning both devices on and then turning both devices off.
4 more elements
A method of reducing the peak output voltage of an amplifier comprising the steps of:
- providing an inductor having first and second terminals;
- providing a first switching device connected to the first terminal of the inductor and to a first supply voltage;
- providing a second switching device connected to the second terminal of the inductor and a second supply voltage;
- applying a voltage between the first and second terminals of the inductor during a first portion of a clock cycle by turning on the first and second switching devices;
- turning off the first and second switching devices during a second portion of the clock cycle;
- providing a third switching device connected between the gate of the first switching device and a third supply voltage;
- providing a fourth switching device connected between the gate of the second switching device and a fourth supply voltage;
- and
- providing a second inductor connected between the gates of the first and second switching devices.
6 more elements
Dependencies are inferred from the claim text.