Voltage and time control circuits

A method of controlling in an integrated circuit device, comprising:

• receiving a plurality of input signals at a mode setting unit and setting at least one input control signal responsive to the plurality of input signals;
• setting a state of at least one output control signal responsive to the at least one input control signal at a voltage level control unit including a control signal generating circuit and a switching circuit and turning the switching circuit on and/or off in response to the at least one output control signal to generate corrected voltage;
• and
• comparing the corrected voltage to a reference voltage and increasing and/or decreasing the internal power voltage responsive to the relationship between the corrected voltage and the reference voltage.

An integrated circuit device, comprising:

• a mode setting unit that receives a plurality of input signals and sets at least one input control signal responsive to the plurality of input signals;
• a voltage level control unit including a control signal generating circuit and a switching circuit, the voltage level control unit being configured to set a state of at least one output control signal responsive to the at least one input control signal and turn the switching circuit on and/or off in response to the at least one output control signal;
• and
• an internal power voltage generating unit that is configured to adjust a circuit voltage that is outside a predetermined circuit voltage specification to within the predetermined circuit voltage specification so that the integrated circuit device is no longer defective, wherein the control signal generating circuit comprises:
• a first fuse having a first terminal coupled to a power supply voltage;
• a first transistor having a drain coupled to a second terminal of the first fuse, a gate coupled to a first input control signal line and a source coupled to a ground voltage;
• a second transistor having a source coupled to the second terminal of the first fuse, a gate coupled to a first node of the control signal generating circuit and a drain coupled to a second node of the control signal generating circuit;
• a third transistor including a drain coupled to the second node of the control signal generating circuit, a gate coupled to a second input control signal line and a source coupled to the ground voltage;
• a fourth transistor having a drain coupled to the second node of the control signal generating circuit, a gate coupled to the first node of the control signal generating circuit and a source coupled to the ground voltage;
• a second fuse having a third terminal coupled to the power supply voltage;
• a fifth transistor including a source coupled to a fourth terminal of the second fuse, a gate coupled to the second node of the control signal generating circuit and a drain coupled to the first node of the control signal generating circuit;
• a sixth transistor including a drain coupled to the first node of the control signal generating circuit, a gate coupled to the second node of the control signal generating circuit and a source coupled to the ground voltage;
• and
• a seventh transistor including a drain coupled to the first node of the control signal generating circuit, a gate coupled to the second input control signal line and a source coupled to the ground voltage.