Substrate structure of flip chip package
AssigneeSiliconware Precision Industries Co., Ltd.
InventorsYing-Chou Tsai, Han-Ping Pu, Shih-Kuang Chiu
Life of this patent
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Abstract
A substrate structure of Flip Chip package includes a plurality of patterned circuit layers alternately stacking up with at least an insulative layer for isolating the patterned circuit layers. The patterned circuit layers are electrically connected each other wherein one of the patterned circuit layers is positioned on the surface of the substrate. The patterned circuit layer includes a plurality of first mounting pads and a plurality of second mounting pads. The solder mask layer covers the patterned circuit layer on the surface of the substrate, and a portion of the surface of the outer edge of the mounting pads while exposes a portion of the surface of the first mounting pads and the whole surface of the second mounting pads.
Claims13
A substrate structure of Flip Chip package comprising:
- a plurality of patterned circuit layers;
- at least an insulative layer stacked between the patterned circuit layers for isolating the patterned circuit layers, and the patterned circuit layers are electrically connected one another, and one of the patterned circuit layer is positioned on the surface of the substrate of the flip chip package as a top patterned circuit layer, and the top patterned circuit layer comprises at least a plurality of first mounting pads and a plurality of second mounting pads;
- and
- a solder mask layer covering the patterned circuit layer on the surface of the substrate of the flip chip package, the solder mask layer partially covering a first top surface of the first mounting pads while entirely exposing a second top surface and sidewalls of the second mounting pads, wherein the first mounting pads are disposed at a peripheral region of the substrate and the second mounting pads are disposed at a central region of the substrate, and wherein said first and second mounting pads are directly attached to corresponding bumps of a chip.
A substrate structure of Flip Chip package comprising:
- a plurality of patterned circuit layer;
- at least an insulative layer stacked between the patterned circuit layers for isolating the patterned circuit layers, and the patterned circuit layers are electrically connected one another, and one of the patterned circuit layer is positioned on the surface of the substrate of the flip chip package as a top patterned circuit layer, and the top patterned circuit layer comprises at least a plurality of first mounting pads and a plurality of second mounting pads;
- a solder mask layer covering the top patterned circuit layer on the surface of the substrate of the flip chip package, the solder mask layer partially covering a first top surface of the first mounting pads while entirely exposing a second top surface and sidewalls of the second mounting pads, wherein the first mounting pads surround the second mounting pads;
- a chip having an active surface with a plurality of bumps disposed thereon wherein the chip has its active surface face to the surface of the substrate of the flip chip package, and the bumps are directly attached to their corresponding first bonding pads and second bonding pads respectively;
- and
- an underfill material filling between the active surface of the chip and the top surface of the substrate of the flip chip package.
Dependencies are inferred from the claim text.