Rearrangement sheet, semiconductor device and method of manufacturing thereof

A semiconductor device comprising:

• a substrate;
• a first element provided with a plurality of first bonding pads, and being disposed in a first element formation region on an upper surface of the substrate;
• a second element provided with a plurality of second bonding pads, the second element being disposed over an upper side of the first element;
• a plurality of bonding posts provided on the upper surface of said substrate, and outside so as to surround the first element formation region;
• first wires that electrically connect respective ones of the bonding posts with respective ones of said first bonding pads;
• and
• a rearrangement sheet provided with an insulating sheet, and a plurality of conductive metallic patterns that are formed on the insulating sheet, the rearrangement sheet being provided between said first element and said second element;
• wherein said conductive metallic patterns are formed in a region exposed from said second element, so that the conductive metallic patterns surround, and do not extend under, the second element, said conductive metallic patterns each including a first portion that can be reached by a straight line extending from another respective one of the bonding posts for a second pad connection, without contacting or crossing said first bonding pads, and a second portion, capable of wire bonding with a respective one of the second bonding pads, thereby coupling the another respective one of the bonding post to the second bonding pad;
• the first portions and the another respective ones of the bonding posts being electrically connected by first relay wires;
• and
• said second portion and said respective ones of the second bonding pads being electrically connected by second relay wires.

A semiconductor device, comprising:

• a semiconductor element having a plurality of bonding pads formed on an upper surface thereof;
• a rearrangement sheet comprising an insulating sheet and conductive metallic patterns electrically connected with said bonding pads, stuck onto the upper surface of the semiconductor element other than in a region where the bonding pads are formed so as to be surrounded by the bonding pads;
• and
• a sealed portion that seals the upper surface of said semiconductor element so as to cover said rearrangement sheet;
• wherein said conductive metallic patterns comprise rearrangement posts of a same number as said bonding pads, wire connection portions of the same number as the bonding pads, the rearrangement posts and the wire connection portions being arranged so that the rearrangement posts are surrounded by the wire connection portions, and rewiring leads that connect said rearrangement posts and said wire connection portions;
• said wire connection portions and said bonding pads are connected by metallic wires,
• conductive posts are formed on an upper surface of said rearrangement posts;
• and
• part of the conductive posts is exposed from said sealed portion.

In combination, an element having a top surface;

• and a rearrangement sheet mountable on the top surface of the element, the rearrangement sheet including:
• an insulating sheet having a smaller size in area than the top surface of the element, the insulating sheet having an element mounting region defined thereon;
• and
• a plurality of conductive metallic patterns formed on the insulating sheet so as to surround, and not extend into, the element mounting region, each of the conductive metallic patterns extending continuously, and in a straight line.