Method for filling structural gaps and integrated circuitry
AssigneeMicron Technology, Inc.
InventorChris W. Hill
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AssigneeMicron Technology, Inc.
InventorChris W. Hill
Estimating the term…
A semiconductor processing method for filling structural gaps includes depositing a substantially boron free silicon oxide comprising material at a first average deposition rate over an exposed semiconductive material in a gap between wordline constructions and at a second average deposition rate less than the first average deposition rate over the wordline constructions. A reduced gap having a second aspect ratio less than or equal to a first aspect ratio of the original gap may be provided. An integrated circuit includes a pair of wordline constructions separated by a gap therebetween in areas where the wordline constructions do not cover an underlying semiconductive substrate. A layer of substantially boron free silicon oxide material has a first thickness over the substrate within the gap and has a second thickness less than the first thickness over the wordline constructions.
An integrated circuit comprising:
An integrated circuit comprising:
An integrated circuit comprising:
A semiconductor processing method for filling structural gaps comprising:
A semiconductive processing method for filling structural gaps comprising:
A semiconductive processing method for filling structural gaps comprising:
An integrated circuit comprising:
An integrated circuit comprising:
An integrated circuit comprising:
An integrated circuit comprising:
Dependencies are inferred from the claim text.