US 6,787,827 B2Granted

Semiconductor device and method for manufacturing the same

AssigneeKabushiki Kaisha Toshiba

InventorsSeiji Inumiya, Katsuhiko Hieda, Tetsuo Matsuda, Yoshio Ozawa

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Abstract

A method of manufacturing a semiconductor device comprising the steps of forming a dummy film and a dummy gate pattern at a predetermined gate-forming region on a semiconductor substrate, forming a first side wall insulating film on a side wall of the dummy gate pattern, forming an interlayer insulating film on a portion of the semiconductor substrate around the dummy gate pattern bearing the first side wall insulating film, forming a groove by removing the dummy gate pattern, removing a portion of dummy film exposed through the groove while leaving a portion of the first side wall insulating film as well as a portion of the dummy film disposed below the portion of the first side wall insulating film, forming a gate insulating film at least on a bottom surface of the groove, and forming a gate electrode on the gate insulating film formed in the groove.

Claims6

Dependent claims

A semiconductor device comprising:

a semiconductor substrate;
a first insulating film selectively formed on a surface of said semiconductor substrate;
a gate insulating film selectively formed on a surface portion of said semiconductor substrate where said first insulating film is not formed, said gate insulating film including a first gate insulating film and a second gate insulating film formed between said semiconductor substrate and said first gate insulating film;
a gate electrode formed on said gate insulating film;
and
a second insulating film formed of the same material as the first gate insulating film and formed on a side wall of said gate electrode at the same time as said first gate insulating film;
and
a side wall insulating film which is formed on said second insulating film,
wherein a total film thickness of said gate insulating film and said second insulating film is larger than a film thickness of said insulating film.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/132,255Filed 26 Apr 2002 · division
Priority: JP 9-17419830 Jun 1997
Published: US 2002/0117698 A129 Aug 2002
Granted: 7 Sep 2004
Term ends: Not estimatedThe source records don’t support an estimate.

Classification12 codes

H10D 64/0134
On single crystalline silicon, e.g. chemical oxidation using a liquid: with a treatment, e.g. annealing, after the formation of the insulator and…
H10D 64/01342
On single crystalline silicon, e.g. chemical oxidation using a liquid: by deposition, e.g. evaporation, ALD or laser deposition
H10D 64/01344
On single crystalline silicon, e.g. chemical oxidation using a liquid: in a nitrogen-containing ambient, e.g. N2O oxidation
H10D 64/017
Manufacture or treatment: using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e.…

Family

Application09/106,208Parent of this division · filed 29 Jun 1998
Application09/621,450Parent of this division · filed 21 Jul 2000
US 2002/0117698 A1Pre-grant publication · published 29 Aug 2002
US 6,403,997 B1Parent of this division
US 6,251,763 B1Parent of this division
US 6,787,827 B2This patent

From the US filing history. Foreign family members aren’t listed.