Polymer memory device formed in via opening

A method of fabricating a polymer memory device in a via comprising:

• providing a semiconductor substrate having at least a first dielectric layer thereon;
• forming at least one of a copper bit line and a copper pad in the first dielectric layer;
• forming at least a second dielectric layer over the at least one of the copper bit line and the copper pad;
• forming at least one via in the second dielectric layer to expose at least a portion of the at least one copper bit line and copper pad;
• growing a polymer material in a lower portion of the via;
• forming a top electrode material layer in an upper portion of the via;
• and
• forming a word line over at least the top electrode layer.

A system of fabricating a polymer memory device in a via comprising:

• method of fabricating a polymer memory device in a via comprising:
• means for providing a semiconductor substrate;
• means for forming at least a first dielectric layer over the semiconductor substrate;
• means for forming at least one of a copper bit line and a copper pad in the first dielectric layer;
• means for forming at least a second dielectric layer over the at least one of the copper bit and the copper pad;
• means for forming at least one via in the second dielectric layer to expose at least a portion of the at least one copper bit line and copper pad;
• means for growing a polymer material in a lower portion of the via;
• means for forming a top electrode material layer in an upper portion of the via;
• and
• means for forming a word line over at least the top electrode layer.