Semiconductor device and manufacturing method thereof
AssigneeRenesas Technology Corp.
InventorsYasuhiro Shimamoto, Katsunori Obata, Kazuyoshi Torii, Masahiko Hiratani
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AssigneeRenesas Technology Corp.
InventorsYasuhiro Shimamoto, Katsunori Obata, Kazuyoshi Torii, Masahiko Hiratani
Estimating the term…
In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to {fraction (1/100)} or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.
A method for manufacturing a semiconductor device having a field effect transistor in which a metal oxide film of a higher dielectric constant than that of a silicon oxide film formed on a silicon substrate is used as a gate insulation film, comprising:
A method for manufacturing a semiconductor device having a field effect transistor in which a metal oxide film of a higher dielectric constant than that of a silicon oxide film formed on a silicon substrate is used as a gate insulation film, comprising:
Dependencies are inferred from the claim text.