Method and system for circular addressing with efficient memory usage

An apparatus generating addresses for circular address buffers having an implied high address boundary in a memory, comprising:

• inputs that receive a current address A, an address offset M, and a buffer length value L;
• and
• logic configured to compute a memory address for locations in the memory in response to A, M, and L, wherein the memory address corresponds the current address A plus the address offset M for a circular buffer having address boundary Y and comprising addresses Y through (Y−L);
• wherein L is a value that when expressed in binary has a leading 1 at bit position N, and the address boundary Y is computed by replacing lower N bits of current address A with 1's.

An integrated circuit, comprising:

• a processor;
• registers coupled with the processor that store a current address A, an address offset M, a buffer length value L;
• memory;
• and
• an address generator coupled with the processor to generate addresses for a first circular buffer having address boundary X and including addresses X through (X+L) or in a second circular buffer having address boundary Y and comprising addresses Y through (Y−L) in the memory, the address generator configured to compute a memory address for locations in the memory in response to A, M, and L, and in response to a control signal identifying one of the first circular buffer or the second circular buffer, wherein the memory address corresponds to the current address A plus the address offset M within the first circular buffer if the control signal identifies the first circular buffer and the memory address corresponds to the current address A plus the address offset M within the second circular buffer if the control signal identifies the second circular buffer.

An integrated circuit, comprising:

• a processor;
• registers coupled with the processor that store a current address A, an address offset M, a buffer length value L;
• memory;
• and
• an address generator generating addresses for circular address buffers having an implied high address boundary in a memory configured to compute a memory address for locations in the memory in response to A, M, and L, and to provide the memory addresses, wherein the memory address corresponds the current address A plus the address offset M for a circular buffer having address boundary Y and comprising addresses Y through (Y−L):
• wherein L is a value that when expressed in binary has a leading 1 at bit position N, and the address boundary Y is computed by replacing the lower N bits of current address A with 1's.