Address predicting apparatus and methods
AssigneeIntel Corporation
InventorsWayne A. Wong, Christopher B. Wilkerson
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Abstract
Apparatus and methods for addressing predicting useful in high-performance computing systems. The present invention provides novel correlation prediction tables. In one embodiment, correlation prediction tables of the present invention contain an entered key for each successor value entered into the correlation table. In a second embodiment, correlation prediction tables of the present invention utilize address offsets for both the entered keys and entered successor values.
Claims37
An address predictor, comprising:
- a correlation prediction table containing entered correlations, each entered correlation comprising an entered key and an entered successor value, multiple ones of the correlations having duplicate keys but mutually different successor values.
An address predictor, comprising:
- a correlation prediction table containing correlations, each correlation representing a key and a successor value with each key and successor value being an address offset.
A method comprising:
- building address-prediction correlations from a monitored address stream, each correlation representing a key and a corresponding successor value;
- constructing a first entry in correlation prediction table, the first entry containing a first key value and a first successor value;
- constructing at least a second entry in the correlation table, the second entry containing the first key value but a second successor value, different from the first successor value.
A method, comprising:
- building correlations from a monitored address stream, each correlation representing a key and a corresponding successor value, each key and each corresponding successor value being an address offset;
- and
- entering built correlations in an address-prediction correlation table.
A computing system comprising:
- a system bus;
- a processor connected to the system bus;
- a cache connected to the system bus;
- a memory connected to the system bus;
- and
- an address predictor connected to the system bus, the address predictor comprising a correlation prediction table containing entered correlations, each entered correlation comprising an entered key and an entered successor value, multiple ones of the correlations having duplicate keys but mutually different successor values.
A computing system comprising:
- a system bus;
- a processor connected to the system bus;
- a cache connected to the system bus;
- a memory connected to the system bus;
- and
- an address predictor comprising a correlation prediction table containing correlations, each correlation representing a key and a successor value with each key and successor value being an address offset.
Dependencies are inferred from the claim text.