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US 6,785,760 B2Granted
Performance of a PCI-X to infiniband bridge
AssigneeInternational Business Machines Corporation
InventorAlbert Andre Asselin
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AssigneeInternational Business Machines Corporation
InventorAlbert Andre Asselin
Estimating the term…
Communication from a processor in a computer system to a remote input/output (I/O) unit in an expansion drawer using a Peripheral Component Interface (PCI) protocol is optimized to improve system performance. An InfiniBand (IB) protocol link is used to couple the I/O unit to the computer system. In one case the computer system uses a PCI to IB bridge to couple from the processor to a corresponding IB to PCI bridge in the expansion drawer which couples to the I/O unit using a PCI link. Intelligence is added to the PCI to IB bridge to optimize communication by assigning selected PCI command sequences to optimized Macro IB commands. The IB to PCI link has like intelligence to receive and convert the Macro IB commands to the corresponding selected PCI command sequences. Optimization is accomplished by either a learning routine or by a logic state machine that generate the optimized Macro commands. In other embodiments, a modified operating system (OS) or software running on an unmodified OS intercepts PCI commands and generate the Macro IB commands which are sent to the IB to PCI bridge via a host communication adapter (HCA). In other embodiments, device drivers are linked to a library of software routines which intercept the PCI commands. In this case, the library generates the optimized Macro IB commands.
A method for interfacing a processor using a first protocol (P1) to an input/output (I/O) device using said P1 comprising the steps of:
A method for interfacing a processor using a first protocol (P1) to an input/output (I/O) device using said P1 comprising the steps of:
A method for interfacing a processor using a first protocol (P1) to an input/output (I/O) device using said P1 comprising the steps of:
A method for interfacing a processor using a first protocol (P1) to an input/output (I/O) device using said P1 comprising the steps of:
A method for interfacing a processor using a first protocol (P1) to an input/output (I/O) device using said P1 comprising the steps of:
A method for interfacing a processor using a first protocol (P1) to an input/output (I/O) device using said P1 comprising the steps of:
A computer system interfacing a processor using a first protocol (P1) to an input/output (I/O) device using said P1 comprising:
A computer program product for optimizing communication from a processor to an input/output (I/O) unit using a first protocol (P1), said computer program product embodied in a machine readable medium, including programming for a processor, said computer program comprising a program of instructions for performing the program steps of:
Dependencies are inferred from the claim text.