Back to results
US 6,785,327 B1Granted
Multiported register file for burst mode coefficient updating
AssigneeAgere Systems Inc.
InventorsPatrik Larsson, Christopher John Nicol
Life of this patent
Estimating the term…
Loading patent…
Loading patent…
AssigneeAgere Systems Inc.
InventorsPatrik Larsson, Christopher John Nicol
Estimating the term…
Multiported register files used for storing coefficients in adaptive FIR are improved upon by implementing a split memory architecture that has the ability to separately control the least significant bits and the most significant bits of coefficient values that are stored in the filter. When the filter is operated to use so-called “burst mode” updating, the updating circuitry of the filter can be disabled and only the most significant bits of the coefficients are read out from the multiported register file while the least significant bits remain unchanged. This conserves power without sacrificing precision, since only certain ones of the bits of the coefficients are used in the multiplication of the sample. In addition, when only the most significant bits of the coefficients are being cycled through the register filter, any changing bits are prevented from being supplied to the updating circuit, so that the updating circuit performs no computation at all, rather than performing one that is discarded. Advantageously, using such improved multiported register files, adaptive FIR filters can be constructed which operate with lower power consumption.
A device for storing coefficients for use, in an adaptive FIR filter comprising:
A multiported register file for storing coefficients for use in an adaptive FIR filter comprising:
An adaptive filter including a multiported register file, said filter being arranged to operate using burst mode updating, said multiported register file comprising:
A method for use in a operating a multiported register file for storing coefficient values in a memory that has a split architecture, the method comprising the steps of:
The invention as defined in 28 wherein said first output is coupled to a coefficient input of a multiplier of a filter.
The invention as defined in 28 wherein said second output is coupled to a coefficient update unit of a filter.
The invention as defined in 28 wherein said second output is coupled to a coefficient update unit of a filter.
The invention as defined in 28 wherein said preventing step includes at least disabling reading out of least significant bits of a currently addressed memory location.
The invention as defined in 28 wherein said preventing step includes tri-stating said second output.
The invention as defined in 28 wherein said preventing step includes at least disabling reading out of least significant bits of a currently addressed memory location and tri-stating most significant bits of a currently addressed memory location.
The invention as defined in 28 wherein said preventing step includes switching said second output to a steady value.
The invention as defined in 28 wherein said preventing step includes switching said second output to a constant value.
The invention as defined in 28 wherein said preventing step includes at least disabling reading out of least significant bits of a currently addressed memory location and supplying a constant value in lieu of most significant bits of a currently addressed memory location.
The invention as defined in 28 wherein said preventing step is performed when said multiported register file is part of a filter that is operated using burst mode updating and said coefficients need not be updated.
A method for operating a multiported register file in an adaptive filter, the method comprising the steps:
Dependencies are inferred from the claim text.