Charge sharing between bit lines within a memory circuit to increase recharge speed
AssigneeArm Limited
InventorsDavid Michael Bull, Paul Darren Hoxey
Life of this patent
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Abstract
A memory circuit 2 includes a plurality of memory cells 4, 6 which are subject to memory access operations. These memory access operations serve to selectively discharge one or more of the bit lines A, Abar, B, Bbar associated with the memory cells 4, 6. During a subsequent precharge operation serving to restore the precharged voltage levels of the bit lines A, Abar, B Bbar charge sharing is performed between non-accessed bit lines and those which have been accessed and accordingly at least partially discharged. Also the precharging circuits 12, 14, 16, 18 associated with the non-accessed bit lines contribute towards the precharging operation.
Claims14
A memory circuit comprising:
- a plurality of memory cells operable to store respective data values;
- a plurality of bit lines coupled to said plurality of memory cells and operable such that when a target memory cell is subject to a memory access operation a target bit line coupled to said target memory cell is driven away from a precharged state;
- a precharge circuit operable to perform a precharge operation to precharge said plurality of bit lines to said precharged state prior to said memory access operation;
- and
- a charge sharing circuit operable following said memory access to couple bit lines of one or more memory cells not subject to said memory access operation to said target bit line that was driven away from said precharged state to share charge with said target bit line to augment said precharge circuit in returning said target bit line to said precharged state.
A method of operating a memory circuit, said method comprising the steps of:
- storing data values within respective ones of a plurality of memory cells, said plurality of memory cells being coupled to a plurality of bit lines;
- when a target memory cell is subject to a memory access operation, driving a target bit line coupled to said target memory cell away from a precharged state;
- performing a precharge operation to precharge said plurality of bit lines to said precharged state prior to said memory access operation;
- and
- following said memory access, coupling bit lines of one or more memory cells not subject to said memory access operation to said target bit line that was driven away from said precharged state to share charge with said target bit line to assist in said precharge operation returning said target bit line to said precharged state.
Dependencies are inferred from the claim text.