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US 6,785,107 B1Granted
Power sequence protection for a level shifter
AssigneeLSI Logic Corporation
InventorJonathan Schmitt
Life of this patent
Estimating the term…
Abstract
A method of power sequence protection for a level shifter is disclosed that includes the steps of placing the level shifter in a pre-selected state if an input voltage supply is not powered on when an output voltage supply is powered on and releasing the level shifter from the pre-selected state to follow transitions of an input signal when the input voltage supply is powered on.
Claims7
A power sequence protection circuit comprising:
- a latch electrically coupled to an input voltage supply and an output voltage supply;
- and
- a switch electrically coupled to the latch wherein the latch sets the switch to a first state for holding a level shifter in a pre-selected state if the output voltage supply is powered on when the input voltage supply is not powered on and wherein the latch sets the switch to a second state for releasing the level shifter from the pre-selected state when the input voltage supply and the output voltage supply are powered on.
A power sequence protection circuit comprising:
- a switch connected to a level shifter between an output signal port or an inverted output signal port of the level shifter and a common voltage rail;
- and
- a latch connected to the switch to drive the switch to a conducting state if an input voltage supply is not powered on when an output voltage supply is powered on and to drive the switch to a non-conducting state if the input voltage supply and the output voltage supply are powered on.
Dependencies are inferred from the claim text.