Accelerated graphics port expedite cycle throttling control mechanism

A method comprising:

• monitoring expedite and non-expedite requests in a monitoring window having a predetermined duration to determine a number of clock cycles for the expedite and the non-expedite requests, the number of cycles for the non-expedite requests being monitored by a non-expedite counter;
• arbitrating between the expedite and non-expedite requests;
• processing the non-expedite requests for a guaranteed number of clock cycles in the monitoring window;
• and
• preprogramming a monitoring window value for the monitoring window during which the number of clock cycles counted with an expedite signal asserted is monitored.

An apparatus comprising:

• a throttling decision logic configured to monitor expedite and non-expedite requests in a monitoring window having a predetermined duration to determine a number of clock cycles for expedite requests;
• an arbiter coupled to the throttling decision logic to arbitrate between the expedite and non-expedite requests;
• and
• a throttling register coupled to the throttling decision logic configured to provide the throttling decision logic with the monitoring window and a value for a predetermined number of clock cycles, the arbiter processing the non-expedite requests for the predetermined number of clock cycles, the number of cycles for non-expedite requests being monitored by a non-expedite counter.

An apparatus comprising:

• a throttling decision logic configured to monitor expedite and non-expedite requests in a monitoring window having a predetermined duration to determine a number of clock cycles for expedite requests, the throttling decision logic counting number of clock cycles during the monitoring window and being provided with an expedite signal associated with data transfer requests to a component which are expedite requests, the component comprising an accelerated graphics port device, the throttling decision logic comprising an expedite throttle decision logic configured to generate a mask control signal to mask the expedite signal to the arbiter to provide the non-expedite cycles a guaranteed minimum period for processing during the monitoring window;
• an arbiter coupled to the throttling decision logic to arbitrate between the expedite and non-expedite requests, the arbiter being configured to provide access to the data transfer requests to the component at high priority if the expedite signal is asserted;
• a throttling register coupled to the throttling decision logic configured to provide the throttling decision logic with the monitoring window and a value for a predetermined number of clock cycles, the arbiter processing the non-expedite requests for the predetermined number of clock cycles, the number of cycles for non-expedite requests being monitored by a non-expedite counter;
• a monitor counter coupled to the throttling register, the monitor counter configured to monitor a processed expedite signal to determine the number of expedite cycles processed during the monitoring window;
• a non-expedite counter coupled to the throttling register, the non-expedite counter configured to monitor the processed expedite signal to determine the number of non-expedite cycles processed during the monitoring window;
• and
• a comparator coupled to the monitoring counter and the non-expedite counter, the comparator configured to compare the number of expedite cycles counted during the monitoring window to the number of non-expedite cycles counted.

A system comprising:

• a memory device configured to accept data transfer requests from various devices;
• and
• a controller coupled to the memory device, the controller comprising:
• a throttling decision logic configured to monitor expedite and non-expedite requests in a monitoring window having a predetermined duration to determine a number of clock cycles for the expedite requests;
• an arbiter coupled to the throttling decision logic to arbitrate between the expedite and non-expedite requests;
• and
• a throttling register coupled to the throttling decision logic configured to provide the throttling decision logic with the monitoring window and a value for a predetermined number of clock cycles, the throttling decision logic processing non-expedite requests for a guaranteed number of clock cycles in the monitoring window, the number of clock cycles for the non-expedite requests being monitored by a non-expedite counter.

A system comprising:

• a memory device configured to accept data transfer requests from various devices;
• and
• a controller coupled to the memory device, the controller comprising:
• a throttling decision logic configured to monitor expedite and non-expedite requests in a monitoring window having a predetermined duration to determine a number of clock cycles for the expedite requests, the throttling decision logic counting number of clock cycles and number of data transfer requests during the monitoring window, the throttling decision logic being provided with an expedite signal associated with data transfer requests to a component which are expedite requests, the component comprising an accelerated graphics port device, the throttling decision logic comprising an expedite throttle decision logic configured to generate a mask control signal to mask the expedite signal to the arbiter to provide the non-expedite cycles a guaranteed minimum period for processing during the monitoring window;
• an arbiter coupled to the throttling decision logic to arbitrate between the expedite and non-expedite requests, the arbiter being configured to provide access to the data transfer requests to the component at high priority if the expedite signal is asserted;
• a throttling register coupled to the throttling decision logic configured to provide the throttling decision logic with the monitoring window and a value for a predetermined number of clock cycles, the throttling decision logic processing non-expedite requests for a guaranteed number of clock cycles in the monitoring window, the number of clock cycles for the non-expedite requests being monitored by a non-expedite counter;
• monitor counter coupled to the throttling register, the monitor counter configured to monitor a processed expedite signal to determine the number of expedite cycles processed during the monitoring window;
• a non-expedite counter coupled to the throttling register, the non-expedite counter configured to monitor the processed expedite signal to determine the number of non-expedite cycles processed during the monitoring window;
• and
• a comparator coupled to the monitoring counter and the non-expedite counter, the comparator configured to compare the number of expedite cycles counted during the monitoring window to the number of non-expedite cycles counted.