Active matrix display device and inspection method for the same

An active matrix display device having a display region consisting of sub-pixels arrayed in a matrix fashion, the sub-pixels having switching elements, comprising:

• a plurality of data signal lines and a plurality of scan signal lines for sending signals to the sub-pixels;
• a plurality of test transistors, each of which is connected to one of the plurality of scan signal lines;
• and
• a set of three of input terminals, each of which is connected to a test transistor,
• wherein a gate of each of the test transistors is connected to one of the input terminals, and the source/drain of each test transistor is alternatively connected to the remaining two input terminals,
• the test transistors control inputs of test signals to the sub-pixels,
• the display region is composed of a plurality of blocks,
• the scan signal lines included in a first block of the plurality of blocks are connected to a first set of the input terminals via sources/drains of the test transistors, and
• the scan signal lines included in a second block of the plurality of blocks are connected to a second set of the input terminals different from the first set of the input terminals via the sources/drains of the test transistors.

An active matrix display device having a display region consisting of sub-pixels arrayed in a matrix fashion, the sub-pixels having switching elements, comprising:

• a plurality of data signal lines and a plurality of scan signal lines for sending signals to the sub-pixels;
• a plurality of test transistors, each of which is connected to one of the plurality of data signal lines;
• a plurality of input terminals, each of which is connected to one of the plurality of test transistors,
• wherein a gate of each of the test transistors is connected to one of the plurality of input terminals, and three input terminals are consecutively connected to the source/drain of the test transistors connected to the even data signal lines and three input terminals are consecutively connected to the source/drain of the test transistors connected to the odd data signal lines,
• source/drain of each of a plurality of the test transistors are connected to one of the data signal lines and one of the input terminals,
• the test transistors control inputs of test signals to the sub-pixels,
• an n-th data signal line and an n+3-th data signal line are connected to the different input terminals via the test transistors.

An active matrix display device having a display region consisting of sub-pixels arrayed in a matrix fashion, the sub-pixels having switching elements, comprising:

• a plurality of data signal lines and a plurality of scan signal lines for sending signals to the sub-pixels;
• a plurality of test transistors, each of which is connected to one of the plurality of data signal lines;
• and
• a set of seven input terminals, each of which is connected to a plurality of the test transistors, and three input terminals are consecutively connected to the source/drain of the test transistors connected to the even data signal lines and three input terminals are consecutively connected to the source/drain of the test transistors connected to the odd data signal lines,
• wherein a gate of each of the test transistors is connected to one of the plurality of input terminals,
• source/drain of each of the plurality of test transistors are connected to one of the data signal lines and one of the input terminals,
• the test transistors control inputs of test signals to the sub-pixels,
• each columns of sub-pixels displays one color,
• the data signal lines of the columns of the sub-pixels displaying the same color and adjacent to each other are connected to the different input terminals via the test transistors.

An image quality inspection method for an active matrix display device having a display region consisting of sub-pixels arrayed in a matrix fashion, comprising the steps of:

• inputting test signals to a first set of three input terminals;
• inputting test signals to a second set of seven input terminals;
• transmitting the inputted test signal to a plurality of test transistors connected to the input terminals of the first set of the input terminals;
• and
• transmitting the inputted test signals to the plurality of test transistors connected to the input terminals of the second set of the input terminals,
• wherein inputs of the test signals to a first block in the display region are controlled by the test transistors connected to the first set of the input terminals;
• and
• the inputs of the test signals to a second block in the display region are controlled by the test transistors connected to the second set of input terminals.

An active matrix display device comprising:

• an array substrate having sub pixel sections arrayed in a matrix fashion, each sub pixel section having a switching element;
• and
• an opposing substrate opposite to the array substrate,
• the array substrate including:
• a plurality of data signal lines and a plurality of scan signal lines for sending signals to the sub pixel sections;
• a plurality of test transistors, respectively connected to the plurality of data signal lines;
• and
• a set of seven input terminals for inputting test signals,
• wherein drains or sources of the test transistors are connected to the data signal lines,
• the gates of the test transistors are connected to a first input terminal of the input terminals,
• the sources or drains of a plurality of the test transistors are connected to a second input terminal of the input terminals, and
• the test transistors control inputting of the test signals to the sub pixel sections.

An active matrix display device comprising:

• an array substrate having sub pixel sections arrayed in a matrix fashion, each sub pixel section having a switching element;
• and
• an opposing substrate opposite to the array substrate,
• the array substrate including:
• a plurality of data signal lines and a plurality of scan signal lines for sending signals to the sub pixel sections;
• a plurality of test transistors, respectively connected to the plurality of scan signal lines;
• and
• a set of three input terminals for inputting test signals,
• wherein drains or sources of the test transistors are connected to the scan signal lines,
• the gates of the test transistors are connected to a first input terminal of the input terminals,
• the sources or drains of a plurality of the test transistors are connected to a second input terminal of the plurality of input terminals, and
• the test transistors control inputting of the test signals to the sub pixel sections.

An image quality inspection method for an active matrix display device including an array substrate having sub pixel sections arrayed in a matrix fashion, each sub pixel section having a switching element, and an opposing substrate opposite to the array substrate, comprising:

• a first step of inputting test signals from a first set of six input terminals;
• a second step of inputting a test signal from a seventh input terminal;
• a third step of sending the test signal inputted from the first set of input terminal to the source electrodes of a plurality of first test transistors connected to the first set of input terminals;
• a fourth step of sending the test signals inputted from the seventh input terminal to the gate electrodes of the plurality of first test transistors connected to the seventh input terminal;
• and
• a fifth step of sending the test signals to the sub pixel sections from the plurality of test transistors via data signal lines respectively connected to the plurality of test transistors,
• wherein the plurality of test transistors control inputting of the test signals to the sub pixel sections to thereby display a desired display screen.