Correction for pipelined analog to digital (A/D) converter

A method of correcting non-linearity error and gain error in a multiple stage pipeline analog to digital converter, the method comprising:

• using an analog to digital conversion to provide a digital signal from a first stage of the multiple stage pipeline analog to digital converter based on an input signal to the first stage thereof;
• using a digital to analog conversion to provide an analog signal from the first stage of the multiple stage pipeline analog to digital converter based on the first stage digital signal provided by the analog to digital conversion, wherein the digital to analog conversion introduces non-linearity error into the multiple stage pipeline analog to digital converter;
• subtracting the analog signal provided by the digital to analog conversion from the input signal resulting in a first stage analog residue signal;
• amplifying the resultant first stage analog residue signal and applying the amplified first stage analog residue signal to one or more subsequent stages of the multiple stage pipeline analog to digital converter, wherein the amplification introduces gain error into the multiple stage pipeline analog to digital converter;
• using at least an analog to digital conversion to provide a first stage digital residue signal from the one or more subsequent stages based on the amplified first stage analog residue signal;
• providing a digital output during each clock cycle of a clock time period based on at least the first stage digital signal provided by the analog to digital conversion in the first stage and the first stage digital residue signal, wherein providing the digital output comprises:
• correcting, during each clock cycle of a plurality of clock cycles of the clock time period, at least a portion of the non-linearity error with use of an averaging over time of the first stage digital residue signal with a pseudorandom sequence, wherein such correction is used to provide a non-linearity corrected digital signal;
• and
• correcting, during the each clock cycle of a plurality of clock cycles of the clock time period, at least a portion of the gain error by averaging the non-linearity corrected digital signal over time.

A multiple stage pipeline analog to digital converter apparatus, the apparatus comprising:

• a plurality of stages comprising a first stage and one or more subsequent stages, wherein at least the first stage is configured to receive an input signal and is connected to a subsequent stage by an amplifier, wherein the first stage comprises:
• an analog to digital converter configured to receive the input signal and convert the input signal into a digital signal;
• a digital to analog converter configured to receive the digital signal from the analog to digital converter and convert the digital signal to an analog signal;
• and
• a subtraction circuit operable to subtract the analog signal received from the digital to analog converter from the input signal applied to the first stage resulting in a first stage analog residue signal that is applied to the amplifier between the first stage and the one or more subsequent stages, wherein the one or more subsequent stages comprise at least one stage operable to convert the first stage analog residue signal to a first stage digital residue signal;
• a non-linearity correction circuit associated with the first stage operable to continuously provide, during each of a plurality of clock cycles, an average of the first stage digital residue signal with a pseudorandom sequence resulting in an averaged first stage digital residue correction signal;
• a combining circuit configured to subtract the averaged first stage digital residue correction signal from a sum of the first stage digital signal from the analog to digital converter and at least the first stage digital residue signal for use in providing a non-linearity corrected digital output signal;
• and
• a gain correction circuit operable to continuously provide, during each of the plurality of clock cycles, an average of the non-linearity corrected digital output signal.