Digital phase control using first and second delay lines
AssigneeNEC Electronics Corporation
InventorSatoshi Nakamura
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AssigneeNEC Electronics Corporation
InventorSatoshi Nakamura
Estimating the term…
A digital phase control method phase shifts a predetermined number of clock signals having the same frequency and having different phases at high precision and at high resolution as a whole with its phase interval maintained to keep a predetermined interval. The digital phase control method comprises the steps of preparing fourteen first multi-phase clock signals having a fixed phase, of preparing sixteen second multi-phase clock signals, of phase locking a specific clock signal of the fourteen first multi-phase clock signals with a particular clock signal of the sixteen second multi-phase clock signals, and of changing a combination of the specific and the particular clock signals to be phase-locked to phase shift the second multi-phase clock signals. In addition, in order to generate the second multi-phase clock signals, a delay line comprising ring-shaped chained delay buffers may be used.
A delay locked loop generating multi-phase clock signals, said delay locked loop comprising:
A delay locked loop generating multi-phase clock signals, said delay locked loop comprising:
Dependencies are inferred from the claim text.