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US 6,784,710 B2Granted
Multistage pulse width modulator
AssigneeCirrus Logic, Inc.
InventorsJack B. Andersen, Caleb Roberts
Life of this patent
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Abstract
Two or more pulse width modulation stages, each having progressively higher resolution, are utilized to allow the lower resolution stage or stages to operate at lower clock speeds. Later stages are operated at higher clock speeds and thus a smaller portion of the total pulse width modulation circuit utilizes the higher clock speed. Additionally, later stages operate over smaller time intervals in order to reduce usage of the later stages.
Claims19
An apparatus comprising:
- a first pulse width modulator stage including a first comparator operable to receive a first reference signal and a sample signal and to compare the first reference signal to the sample signal;
- and
- a second pulse width modulator stage coupled to the first pulse width modulator stage and including a second comparator operable to receive a second reference signal and the sample signal and to compare the second reference signal to the sample signal;
- and
- wherein the first pulse width modulator stage operates at lower clock speed than the second pulse width modulator stage.
2 more elements
A method of producing a pulse width modulated signal comprising:
- generating a first reference signal for a first time interval;
- comparing the first reference signal to a sample signal;
- producing a first output signal depending on the comparing the first reference signal to a sample signal;
- generating a second reference signal for a second time interval wherein the first time interval is greater than the second time interval;
- comparing the second reference signal to the sample signal;
- and
- producing a second output signal depending on the comparing the second reference signal to the sample signal.
4 more elements
A method of producing a pulse width modulated signal comprising:
- generating a first reference signal;
- comparing the firs reference signal to a sample signal;
- producing a first output signal depending on the comparing the first reference signal to a sample signal;
- generating a second reference signal;
- comparing the second reference signal to the sample signal;
- producing a second output signal depending on the comparing the second reference signal to the sample signal;
- comparing the first reference signal to a sum of the sample signal and a signal level interval;
- and
- producing a third output signal depending on the comparing the first reference signal to a sum of the sample signal and a signal level interval.
6 more elements
Dependencies are inferred from the claim text.