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AssigneeInfineon Technologies AG
InventorPeter Beer
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The circuit configuration allows selective transmission of information items to a chip of a wafer during chip fabrication, and an apparatus having a needle card. During the test procedure of chips of a wafer which are tested in parallel, the problem can arise that, by way of example, an individual chip has a repairable defect or an incorrectly set voltage. Since a plurality of chips, for example memory modules, are tested simultaneously by a measuring device, it is not readily possible to transmit targeted information items to the individual chip. An external memory is thus assigned to each contact array on a needle card. In that memory, the individual information items are buffer-stored and transmitted to the individual chip. This affords the advantage that specific defective chips can be repaired in a simple manner without additional, costly control devices being necessary.
A circuit configuration for selectively transmitting information items from a measuring device to chips on a wafer, comprising:
A wafer-level testing system, comprising:
Dependencies are inferred from the claim text.