Integrated circuit device module
AssigneeFujitsu Limited
InventorTsutomu Mezawa
Life of this patent
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Abstract
According to the present invention, for a module in which a plurality of integrated circuit devices are mounted in parallel, the inductance generated by the unit length of a branched signal line on a motherboard is so set that it is smaller for a branched signal line a longer distance from its branching point to its distal end, and is so set that it is larger for a branched signal line having a shorter distance from its branching point to its distal end, so that the time required for transmission of a signal from the branching point to the distal end of each branched signal line is the same.
Claims7
An integrated circuit device module, in which a plurality of groups of integrated circuit devices are mounted on a motherboard, comprising:
- a plurality of branched signal lines, formed on said motherboard and extending from a common branch node to individual distal ends, along which a common signal is supplied to said groups of integrated circuit devices respectively,
- wherein each of said plurality of branched signal lines comprises a first branched signal line having a first length from said branch node to the distal end, and a second branched signal line having a second length from said branch node to the distal end which is shorter than said first length, and an inductance generated by the unit length of said first branched signal line is smaller than an inductance generated by the unit length of said second branched signal line.
An integrated circuit device module, in which a plurality of integrated circuit devices are mounted on a motherboard, comprising:
- first and second branched signal lines, formed on said motherboard and each extending from a common branch node to a distal end, through which a common signal is supplied to said integrated circuit devices respectively,
- wherein said first branched signal line having a first length from said common branch node to its distal end, and said second branched signal line having a second length from said common branch node to its distal end which is shorter than said first length, and an inductance per unit length of said first branched signal line is smaller than that of said second branched signal line.
Dependencies are inferred from the claim text.