Non-volatile semiconductor memory device having memory cell array suitable for high density and high integration

A non-volatile semiconductor memory device comprising:

• a semiconductor body of a first conductivity type;
• first and second semiconductor regions of a second conductivity type, formed apart from each other on the semiconductor body;
• a gate insulation film formed on the semiconductor body between the first and second semiconductor regions and on the second semiconductor region;
• a first stacked gate formed on the gate insulating film on the semiconductor body between the first and second semiconductor regions, the first stacked gate including a charge storage layer on the gate insulating film, a control gate on the charge storage layer, and a cap insulating film on the control gate, and the first stacked gate having a first side surface, a second side surface opposed to the first side surface, and an upper surface, the first and second surfaces each including side surfaces of the charge storage layer, the control gate, and the cap insulating film;
• an interlayer insulating film formed above the semiconductor body;
• a contact material buried to be adjacent to the first side surface of the first stacked gate in the interlayer insulating film, the contact material contacting the first semiconductor region;
• a first insulating film formed on the side surface of the control gate on the first side surface, and on all of the side surface of the charge storage layer on the first side surface, and on the gate insulating film on the second semiconductor region;
• and
• a second insulating film formed on the first side surface adjacent to the contact material, and on the first insulating film on the gate insulating film on the second semiconductor region, the second insulating film having an etch rate slower than that of said first insulating film.

A non-volatile semiconductor memory device comprising:

• a semiconductor body of a first conductivity type;
• first and second semiconductor regions of a second conductivity type, formed apart from each other on the semiconductor body;
• a gate insulating film formed on the semiconductor body between the first and second semiconductor regions and on the second semiconductor region;
• a first stacked gate formed on the gate insulating film on the semiconductor body between the first and second semiconductor regions, the first stacked gate including a charge storage layer on the gate insulating film, a control gate on the charge storage layer, and a cap insulating film on the control gate, and the first stacked gate having a first side surface, a second side surface opposed to the first side surface, and an upper surface, the first and second surfaces each including side surfaces of the charge storage layer, the control gate, and the cap insulating film;
• an interlayer insulating film formed above the semiconductor body;
• a contact material buried to be adjacent to the first side surface of the first stacked gate in the interlayer insulating film, the contact material contacting the first semiconductor region;
• a first insulating film formed on the side surface of the control gate on the first side surface, on all of the side surface of the charge storage layer on the first side surface, on the side surface of the control gate on the second side surface, on all of the side surface of the charge storage layer on the second side surface and on the gate insulating film on the second semiconductor region;
• and
• a second insulating film formed on the first side surface adjacent to the contact material, the second insulating film having an etch rate slower than that of said first insulating film and being formed on the first insulating film, the second insulating film being formed on the second side surface and on the first insulating film on the gate insulating film on the second semiconductor region.

A non-volatile semiconductor memory device comprising:

• a semiconductor body of a first conductivity type;
• first and second semiconductor regions of a second conductivity type, formed apart from each other on the semiconductor body;
• a gate insulating film formed on the semiconductor body between the first and second semiconductor regions and on the second semiconductor region;
• a stacked gate formed on the gate insulating film on the semiconductor body between the first and second semiconductor regions, the stacked gate having a first side surface, a second side surface opposed to the first side surface, and an upper surface;
• an interlayer insulating film formed above the semiconductor body;
• a contact material buried to be adjacent to the first side surface of the stacked gate in the interlayer insulating film, the contact material contacting the first semiconductor region;
• a first insulating film made from silicon oxide, formed on the second side surface and on the upper surface and on the gate insulating film on the second semiconductor region, but not on the first side surface of the stacked gate adjacent to the contact material;
• and
• a second insulating film made from silicon nitride, formed on the first side surface adjacent to the contact material and on the first insulating film on the gate insulating film on the second semiconductor region.