Semiconductor memory device and method for fabricating the same

A method for fabricating a semiconductor memory device including a memory capacitor and an upper interconnect, the memory capacitor including a lower electrode, an upper electrode and a capacitive insulating film sandwiched between the lower and upper electrodes, the upper interconnect being electrically connected to the upper electrode of the memory capacitor, the method comprising the steps of:

• a) forming a first conductor film on an insulating layer over a semiconductor substrates and then patterning the first conductor film to form the lower electrode and a film for a dummy lower electrode in mutually separated positions;
• b) forming a dielectric film covering the lower electrode and the dummy film;
• c) forming a second conductor film covering the dielectric film;
• d) forming, over the second conductor film, an etching mask covering the whole of the lower electrode and part of the dummy film;
• e) patterning the second conductor film, the dielectric film and the dummy film, thereby forming the capacitive insulating film and an extension of the capacitive insulating film from the dielectric film, forming the upper electrode and an extension of the upper electrode from the second conductor film, and forming a dummy lower electrode from the dummy film;
• and
• f) depositing a third conductor film over a substrate and then anisotropically etching back the third conductor film, thereby forming a conductor sidewall covering exposed parts of respective side faces of the second conductor film, the dielectric film and the dummy lower electrode, after the step e) has been performed.