Si/SiGe optoelectronic integrated circuits

A semiconductor structure comprising a single crystal substrate, a Si1−xGex buffer layer graded from x=0 to x=y, where y is in the range from 0.1 to 0.9, a constant composition layer of relaxed Si1−yGey having a thickness ranging from 0.25 μm to 10 μm, a p-type doped Si1−wGew supply layer, where w<y, an undoped Si1−yGey spacer layer, a Si1−xGex quantum well layer, where x>y, and an additional undoped Si1−yGey spacer layer, wherein said constant composition layer of relaxed Si1−yGey functions as an absorbing region of a photodetector, and said Si1−zGez quantum well layer functions as a conducting channel of a field-effect transistor.

A semiconductor structure comprising a single crystal semiconductor substrate, a Si1−xGex buffer layer graded from x=0 to y in the range from 0.1 to 0.9, followed by a plurality of layers forming a symmetrically-strained superlattice and consisting of alternating layer, of Sil-wGew and Si1−zGez where w<y<z, and having corresponding individual thicknesses such that the average Ge-composition of the layer is y, and having a total thickness ranging from 0.25 μm to 10 μm, and additionally a thin Si1−yGey layer, a quantum well layer, an undoped Si1−y Gey spacer layer, and an n-type doped Si1−yGey supply layer, wherein said symmetric superlattice functions as an absorbing region of a photodetector, and said quantum well layer functions as a conducting channel of a field-effect transistor.

A semiconductor structure comprising a substrate selected from the group consisting of Si and SOl , Si1−xGex buffer layer graded from x=0 to x=y, where y is in the range from 0.1 to 1.0, a constant composition layer of relaxed Si1−yGey, of thickness 0.25 μm to 10 μm, a thin Si surface layer, and a thin gate dielectric, wherein said constant composition layer of relaxed Si1−yGey acts as the absorbing region of a photodetector, and said Si surface layer acts as the conducting channel of field-effect transistor.

A semiconductor structure comprising a single crystal semiconductor substrate, a Si1−xGex buffer layer graded from x=0 to y where y is in the range from 0.1 to 0.9, a layer of relaxed Si1−yGey having a thickness ranging from 0.25 μm to 10 μm, an n-type doped Si1−yGey supply layer, a first undoped Si1−yGey, a first quantum well layer, a second undoped Si1−yGey offset layer, a second quantum well layer, a third undoped Si1−yGey offset layer, an undoped Si layer, a gate dielectric and a gate electrode layer wherein said layer of relaxed Si1−yGey functions as an absorbing region of a photodetector, and said first quantum well layer acts as an electron channel for an n-MOSFET and said second quantum well layer acts as a hole channel for a p-MOSFET.