Dual-sided semiconductor device and method of forming the device with a resistive element that requires little silicon surface area

A method of forming a dual-sided semiconductor device from a wafer, the wafer having a first surface, an opposing second surface, and a dopant concentration, the method comprising the steps of:

• forming a layer of masking material over the first surface of the wafer;
• patterning the layer of masking material to define a first region on the first surface of the wafer;
• forming a layer of masking material on the second surface of the wafer to expose a second region on the second surface of the wafer, the first and second regions being substantially vertically aligned;
• etching the first and second regions for a predetermined period of time to define a first opening in the first surface of the wafer, a second opening in the second surface of the wafer, and a remaining region there between;
• introducing a dopant into the wafer through the first and second openings, the dopant extending continuously through the remaining region to form the doped region, and having a dopant concentration that is greater than the dopant concentration of the wafer;
• and
• forming a layer of conductive material in the first opening in the wafer to form a first conductive region that contacts the doped region.

A method of forming a dual-sided semiconductor device from a wafer, the wafer having a first surface, an opposing second surface, and a dopant concentration, the method comprising the steps of:

• forming a layer of masking material over the first surface of the wafer;
• patterning the laver of masking material to define a first region on the first surface;
• introducing a dopant into the wafer through the first region, the dopant extending continuously through the wafer from the first surface of the wafer to the second surface of the wafer;
• and
• etching the first region for a predetermined period of time after the dopant has been introduced to define an opening in the wafer, and a doped region between the opening and the second surface of the wafer, the doped region having a surface substantially planar with the second surface of the wafer, and a dopant concentration that is greater than the dopant concentration of the wafer;
• and
• forming a layer of conductive material in the first opening in the wafer to form a first conductive region that contacts the doped region.

A method of forming a dual-sided semiconductor device from a wafer, the wafer having a first surface, an opposing second surface, and a dopant concentration, the method comprising the steps of:

• forming a layer of masking material over the first surface of the wafer;
• patterning the layer of masking material to define a first region on the first surface;
• etching the first region for a predetermined period of time to define the opening in the wafer, and a remaining region between the opening and the second surface;
• introducing a dopant into the wafer, the dopant extending continuously through the remaining region to form the doped region, the doped region having a surface substantially planar with the second surface of the wafer, and a dopant concentration that is greater than the dopant concentration of the wafer;
• and
• forming a layer of conductive material in the first opening in the wafer to form a first conductive region that contacts the doped region.

A method of forming a dual-sided semiconductor device from a wafer, the wafer having a first surface, an opposing second surface, and a dopant concentration, the method comprising the steps of:

• forming a layer of masking material over the first surface of the wafer;
• patterning the layer of masking material to define a first region on the first surface;
• forming an opening in the wafer and a doped region in the wafer, the opening forming exposed regions of the wafer, the doped region having a surface exposed by the opening in the wafer, a dopant concentration that is greater than the dopant concentration of the wafer, and a surface substantially planar with the second surface of the wafer;
• forming a layer of conductive material in the opening in the wafer to form a first conductive region that contacts the doped region;
• and
• forming a first device that contacts the first conductive region, and a second device that contacts the doped region.