Method for fabricating semiconductor device capable of reducing seam generations

A method for fabricating a semiconductor device, comprising the steps of:

• forming a plurality of conductive patterns on a substrate;
• forming an etch stop layer along the plurality of the conductive patterns;
• forming an insulation layer on an entire surface of the substrate structure;
• etching selectively the insulation layer to form a plurality of contact holes exposing a portion of the etch stop layer allocated in between the conductive patterns;
• forming an attack barrier layer for preventing the insulation layer from being attacked by a chemical used in a wet cleaning/etching process along a profile containing the contact hole;
• forming a capping layer having an over-hang structure on an upper part of each conductive pattern;
• extending an opening portion of each contact hole by performing a wet cleaning/etching process to a bottom side of each contact hole;
• removing selectively a portion of the etch stop layer and the attack barrier layer disposed at the bottom side of each contact hole to expose a surface of the substrate;
• and
• forming a plug contacted to the exposed surface of the contact hole.