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US 6,784,066 B2Granted
Method for manufacturing semiconductor device and semiconductor device manufactured thereby
AssigneeRenesas Technology Corp.
InventorAtsushi Hachisuka
Life of this patent
Estimating the term…
Abstract
A plurality of gate electrodes is formed on a semiconductor substrate having a DRAM area and a logic area. Next, sidewalls, each of which includes a silicon nitride film covering the sides of gate electrodes and a silicon oxide film covering the silicon nitride film, are formed on the sides of the gate electrodes respectively. After formation of a transistor having an LDD structure in the logic area, the silicon oxide film formed on the sides of the gate electrodes is removed by wet etching. Next, a silicon nitride film is formed on the whole surface of the semiconductor substrate, and an interlayer dielectric is formed on the silicon nitride film.
Claims16
A method of manufacturing a semiconductor device having a first area, a second area and a third area on a semiconductor substrate, comprising:
- a step of forming plurality of gate electrodes over the semiconductor substrate;
- a step of forming lightly-doped regions by implanting an impurity in the semiconductor substrate with the gate electrodes as masks;
- a step of forming a first insulating film on the whole surface of the semiconductor substrate so as to cover the plurality of gate electrodes;
- a step of forming a second insulating film on the first insulating film;
- a step of forming sidewalls on the sides of the plurality of gate electrodes respectively by means of etching the first insulating film and the second insulating film, each of the sidewalls including a layer for the first insulating film covering the sides of the gate electrodes and a layer for the second insulating film covering the layer for the first insulating film;
- a step of forming heavily-doped regions by implanting an impurity in the second area and the third area with the sidewalls as masks;
- a first removing step of removing the layer for the second insulating film formed on the sides of the gate electrodes after said step of forming heavily doped regions;
- a third insulating film forming step of forming a third insulating film on the whole surface of the semiconductor substrate after said first removing step;
- and
- an interlayer dielectric forming step of forming an interlayer dielectric on the third insulating film.
7 more elements
A method of manufacturing a semiconductor device having a first area, a second area and a third area on a semiconductor substrate, comprising:
- a step of forming a plurality of gate electrodes over the semiconductor substrate;
- a step of forming lightly-doped regions by implanting an impurity in the semiconductor substrate with the gate electrodes as masks;
- a step of forming a first insulating film on the whole surface of the semiconductor substrate so as to cover the gate electrodes;
- a second insulating film forming step of forming a second insulating film on the first insulating film;
- a step of forming first sidewalls on the sides of the plurality of gate electrodes respectively by means of etching the first insulating film and the second insulating film formed in the second area, each of the first sidewalls including a layer for the first insulating film covering the sides of the gate electrodes and a layer for the second insulating film covering the layer for the first insulating film;
- a first impurity implanting step of forming heavily-doped regions by implanting an impurity in the second area with the first sidewalls as masks;
- a step of forming second sidewalls on the sides of the gate electrodes by means of etching the first insulating film and the second insulating film formed in the third area, the second sidewalls including a layer for the first insulating film covering the sides of the gate electrodes and a layer for the first insulating film;
- a second impurity implanting step of forming heavily-doped regions by implanting an impurity in the third area with the second sidewalls as masks;
- a first removing step of removing the second insulating film formed in the first area and the layer for the second insulating film formed in the second area and the third area after said first impurity implanting step and said second impurity implanting step;
- a third insulating film forming step of forming a third insulating film on the whole surface of the semiconductor substrate after said first removing step;
- and
- an interlayer dielectric forming step of forming an interlayer dielectric on the third insulating film.
9 more elements
A method of manufacturing a semiconductor device, comprising:
- a step of forming a plurality of gate electrodes over a semiconductor substrate;
- a step of forming lightly-doped regions by implanting an impurity in the semiconductor substrate with the gate electrodes as mask;
- a step of forming a first insulating film on the whole surface of the semiconductor substrate so as to cover the gate electrodes;
- a step of forming a second insulating film on the first insulating film;
- a step of forming sidewalls on the sides of the gate electrodes respectively by means of etching the first insulating film and the second insulating film, each of the sidewalls including a layer for the first insulating film covering the sides of the gate electrodes and a layer for the second insulating film covering the layer for the first insulating film;
- a step of forming heavily-doped regions by implanting an impurity in the semiconductor substrate with the sidewalls as masks;
- a step of removing the layer for the second insulating film formed on the sides of the gate electrodes after said step of forming heavily-doped regions;
- a step of forming a third insulating film on the whole surface of the semiconductor substrate after said removing step;
- a step of forming an interlayer dielectric on the third insulating film;
- and
- a step of forming contact holes on a self-aligned basis with the third insulating film as an etching stopper, each of the contact holes extending from the surface of the interlayer dielectric to the surface of the semiconductor substrate and being placed between the gate electrodes.
8 more elements
Dependencies are inferred from the claim text.