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US 6,784,056 B2Granted
Flash memory cell process using a hardmask
AssigneeTexas Instruments Incorporated
InventorsPaul A. Schneider, Freidoon Mehrad, John H. MacPeak
Life of this patent
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Abstract
A method is described for forming a memory structure using a hardmask (65). The hardmask (65) protects the second polysilicon layer (55) during a SAS etch process. In addition, sidewall structures (95) are formed which protect the inter-polysilicon dielectric layer (45) during the hardmask (65) etch process.
Claims5
A method to form a self-aligned source in a memory cell, comprising:
- providing a semiconductor substrate with a memory structure comprising a first dielectric layer, a first polysilicon layer on said dielectric layer, an inter-polysilicon dielectric layer on said first polysilicon layer, a second polysilicon layer on said inter-polysilicon dielectric layer, and a hardmask layer on said second polysilicon layer;
- performing a self-aligned source etch process;
- forming a cap layer on said memory structure;
- performing an anisotropic cap layer etch to form sidewall structures on said memory structure;
- and
- removing said hardmask layer using a hardmask etch process.
3 more elements
Dependencies are inferred from the claim text.