Photoresist reflow for an enhanced process window for non-dense contacts is disclosed. A corrective bias is determined for application to each of a number of contacts at different pitches, to achieve a substantially identical critical dimension for each contact. The corrective bias is determined based on a first and a second critical dimension for each contact, where the first critical dimension is before photoresist reflow, and potentially inclusive of optical proximity effects, and the second critical dimension is after photoresist reflow. A photomask is then constructed for a semiconductor design that incorporates the corrective bias that has been determined for the contacts of the design. Lithographical processing of the semiconductor design on a semiconductor wafer using thus photomask, and subsequent photoresist reflow, thus achieves a substantially identical critical dimension for each of the contacts of the semiconductor design.
Drawings
Claims20
A method comprising:
determining a corrective bias to be applied to each of a plurality of contacts at different pitches for achieving a substantially identical critical dimension for each of the plurality of contacts at the different pitches, based on a first critical dimension for each of the plurality of contacts at the different pitches before photoresist reflow and a second critical dimension for each of the plurality of contacts at the different pitches after photoresist reflow;
and,
constructing a photomask for a semiconductor design, incorporating the corrective bias determined for contacts of the semiconductor design, such that lithographical processing of the semiconductor design on a semiconductor wafer using the photomask and subsequent photoresist reflow on the semiconductor wafer achieves a substantially identical critical dimension for each of the contacts of semiconductor design.
A photomask formed at least in part by performing a method comprising:
determining a first critical dimension for each of a plurality of contacts at different pitches;
determining a second critical dimension for each of the plurality of contacts at the different pitches after photoresist reflow;
determining a corrective bias to be applied to each of the plurality of contacts at the different pitches for achieving a substantially identical critical dimension for each of the plurality of contacts at the different pitches, based on the first critical dimension and the second critical dimension for each of the plurality of contacts at the different pitches;
and,
constructing a photomask for a semiconductor design, incorporating the corrective bias determined for contacts of the semiconductor design, such that lithographical processing of the semiconductor design on a semiconductor wafer using the photomask and subsequent photoresist reflow on the semiconductor wafer achieves a substantially identical critical dimension for each of the contacts of semiconductor design.
2 more elements
A semiconductor device formed at least in part by a method comprising:
positioning a photomask over a semiconductor wafer having a top layer of photoresist, the photomask constructed by incorporating a corrective bias for contacts of a semiconductor design determined for each of a plurality of contacts at different pitches to achieve a substantially identical critical dimension for each of the plurality of contacts at the different pitches, based on a first critical dimension before photoresist reflow and a second critical dimension after photoresist reflow for each of the plurality of contacts at the different pitches;
exposing the semiconductor wafer through the photomask positioned thereover, such that the top layer of photoresist includes exposed parts under clear parts of the photomask and unexposed parts under opaque parts of the photomask;
developing the semiconductor wafer to remove the exposed parts of the top layer of photoresist;
performing photoresist reflow of the unexposed parts of the top layer of photoresist;
etching the semiconductor wafer where the wafer is revealed through the exposed parts of the top layer of photoresist that has been removed;
and,
removing the unexposed parts of the top layer of photoresist.
16 Feb 2022Estimated · howhide20 years from earliest known nonprovisional domestic filing plus recorded patent term adjustment. Maintenance-fee lapses, terminal disclaimers and statutory extensions have not been checked. The continuity chain may be incomplete; this is not an enforceability determination.
Assigned to Taiwan Semiconductor Manufacturing Co. Ltd.assignment of assignor's interest
PublishedUS 2003/0157808 A1
GrantedUS 6,784,005 B2
Term endedEstimated
Description3,505 words
Summary1,927 words
#This invention relates generally to semiconductor device fabrication, and more particularly to the use of photoresist reflow in conjunction with assist features and/or off-axis illumination (OAI) for such fabrication.
#Since the invention of the integrated circuit (IC), semiconductor chip features have become exponentially smaller and the number of transistors per device exponentially larger. Advanced IC's with hundreds of millions of transistors at feature sizes of 0.25 micron, 0.18 micron, and less are becoming routine. Improvement in overlay tolerances in photolithography, and the introduction of new light sources with progressively shorter wavelengths, have allowed optical steppers to significantly reduce the resolution limit for semiconductor fabrication far beyond one micron. To continue to make chip features smaller, and increase the transistor density of semiconductor devices, IC's have begun to be manufactured that have features smaller than the lithographic wavelength.
#Sub-wavelength lithography, however, places large burdens on lithographic processes. Resolution of anything smaller than a wavelength is generally quite difficult. Pattern fidelity can deteriorate dramatically in sub-wavelength lithography. The resulting semiconductor features may deviate significantly in size and shape from the ideal pattern drawn by the circuit designer. These distortions include line-width variations dependent on pattern density, which affect a device's speed of operation, and line-end shortening, which can break connections to contacts. To avoid these and other optical proximity effects, the semiconductor industry has attempted to compensate for them in the photomasks themselves, as well as by using other approaches.
Brief description of the drawings9 figures
#FIGS. 1A and 1B are diagrams showing a scattering bar (SB) and its placement near an isolated line, to compensate for isolated-dense proximity effect.
#FIG. 2 is a diagram showing an example exposure-defocus (ED) process window for a given pattern feature showing the ranges of exposure dose and focus that permit acceptable lithographic quality.
#FIGS. 3A and 3B are diagrams showing the diffraction orders that result from different types of off-axis illumination (OAI).
Detailed description1,321 words
#In the following detailed description of exemplary embodiments of the invention, reference is made to the accompanying drawings that form a part hereof, and in which is shown by way of illustration specific exemplary embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. Other embodiments may be utilized, and logical, mechanical, and other changes may be made without departing from the spirit or scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined only by the appended claims.
#FIG. 4 shows a method 400 according to an embodiment of the invention. Parts of the method 400 can be used to construct a photomask, and/or to fabricate semiconductor devices on a semiconductor wafer using such a constructed photomask. First, the after-development inspection (ADI) critical dimensions for contacts at different pitches are determined (402). This can be accomplished by exposing a semiconductor wafer using a photomask having contact test patterns of different pitches. The greater the pitch, the denser the contacts are, whereas the lesser the pitch, the less dense the contacts are.
#FIG. 5 shows a graph 500 illustrating example results of 402, and that has a y-axis 502 measuring critical dimension (CD), and an x-axis 504 measuring pitch. The dotted line 506 references a critical dimension of 0.13 micron. The line 508 shows the critical dimensions for contacts at various pitches, where the critical dimensions decrease as contact pitch, or density, increases. The line 508 thus demonstrates optical proximity effects (OPE) that occur, and how OPE primarily affects non-dense contacts. Non-dense contact critical dimensions at low density are around 0.13 micron, whereas dense contact critical dimensions are lower, as indicated by the line 510.