Ring oscillator circuit for EDRAM/DRAM performance monitoring

Abstract

Circuitry and methods are disclosed for quantitatively characterizing the delay of Embedded Dynamic Random Access Memory (EDRAM) and Dynamic Random Access Memory (DRAM). The performance critical portion of the memory is placed in a ring oscillator designed such that the delay through the portion, from a rising input to the memory to a rising output, can be accurately determined. Recently, such memory elements have begun to be implemented on chips along with high-speed logic circuitry. However, the performance characteristics of the memory elements do not track the performance characteristics of the logic circuitry. The current invention allows the memory performance to be characterized along with, or separately from, characterization of the logic circuitry.

Dependencies are inferred from the claim text.