Devices and methods with programmable logic and digital signal processing regions
AssigneeAltera Corporation
InventorsMartin Langhammer, Gregory Starr, Chiao Kai Hwang
Life of this patent
Estimating the term…
Loading patent…
AssigneeAltera Corporation
InventorsMartin Langhammer, Gregory Starr, Chiao Kai Hwang
Estimating the term…
A programmable logic integrated circuit device (“PLD”) includes programmable logic and a dedicated (i.e., at least partly hard-wired) digital signal processing region for performing or at least helping to perform digital signal processing tasks that are unduly inefficient to implement in the more general-purpose programmable logic and/or that, if implemented in the programmable logic, would operate unacceptably or at least undesirably slowly. The digital signal processing region may include multiple digital signal processing stages. The digital signal processing region may include a multiplier stage and one ore more stages that can operate in combination with the multiplier stage. The digital signal processing region has a plurality of modes such as for providing multiply-and-accumulate operation, multiply-and-add operation, etc.
A programmable logic device comprising:
A programmable logic device comprising:
A programmable logic device comprising:
Dependencies are inferred from the claim text.