Method and apparatus for resolving conflicts in a substrate processing system

An apparatus for scheduling allocation of a plurality of transportation resources between modules within a wafer track/stepper cluster for a sequential wafer manufacturing process comprising:

• a memory resource for storing an algorithm for scheduling the plurality of transportation resources for movement of wafers within the wafer track and between the wafer track and stepper;
• a central processing unit coupled to the memory resource;
• and
• an input/output interface coupled to at least one of the central processing unit and the memory resource, the input/output interface adapted, respectively, to input parameters describing the sequential wafer manufacturing process and to output schedules for allocation of transportation resources to transport wafers within the wafer track and between the wafer track and stepper, the output schedules assuring availability of transportation resources and determined such that a sending period and a plurality of times (τi) allotted for a wafer transporter to arrive at a module from initiation of a current sending period for transportation of a wafer from a module i to a module i+1 for the sequential wafer manufacturing process remain fixed at constant values throughout a sequence of wafers.

A method for synchronizing a wafer processing system comprising the following steps:

• selecting a wafer processing system that includes a clustered wafer track system and lithography apparatus with one or more ordered sequence of modules;
• setting a constant sending period of the sequential processing system that remains fixed throughout a sequence of wafers, the constant sending period equaling an inverse of a sending rate;
• and
• expressing a plurality of times allotted for a plurality of wafer transporters to arrive at corresponding modules of the one or more ordered sequence of modules as a plurality of portions of the sending period, each and every time allotted for the plurality of wafer transporters remaining fixed at a constant value throughout a sequence of wafers.