Multiple-mode memory and method for forming same
AssigneeMatrix Semiconductor, Inc.
InventorsMichael A. Vyvoda, Christopher S. Moore
Life of this patent
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Abstract
A multiple-mode memory includes a three-dimensional array of word lines, bit lines and memory cells. The memory cells are arranged in multiple vertically stacked layers. In some layers the memory cells are implemented as field-programmable write-once memory cells, and in other layers the memory cells are implemented as field-programmable re-writable memory cells. In this way, both re-writability and permanent data storage are provided in an inexpensive, single-chip solution. Additional types and numbers of types of memory cells can be used.
Claims28
A multiple-mode memory comprising:
- an integrated circuit substrate;
- a plurality of word lines;
- a plurality of bit lines crossing the word lines;
- a plurality of memory cells, each memory cell coupled between a respective word line and a respective bit line, the word lines, bit lines and memory cells included in a single integrated circuit carried by the substrate;
- the memory cells comprising a plurality of field-programmable write-once memory cells and a plurality of field-programmable re-writable memory cells.
A method for forming a multiple-mode memory, the method comprising:
- (a) providing an integrated circuit substrate;
- (b) forming a set of first levels of field-programmable write-once memory cells carried by and overlying the substrate;
- and
- (c) forming a set of second levels of field-programmable re-writable memory cells carried by and overlying the substrate;
- the first and second levels of memory cells vertically stacked on the substrate in a three-dimensional memory array.
A multiple-mode memory comprising:
- an integrated circuit substrate;
- a plurality of word lines;
- a plurality of bit lines crossing the word lines;
- a plurality of memory cells, each memory cell coupled between a respective word line and a respective bit line, the word lines, bit lines and memory cells included in a single integrated circuit carried by the substrate;
- the memory cells comprising a plurality of memory cells of a first type and a plurality of memory cells of a second type;
- wherein the memory cells of the first type comprise field-programmable write-once memory cells, and wherein the memory cells of the second type comprise field-programmable re-writable memory cells.
Dependencies are inferred from the claim text.