Semiconductor memory device with memory cells having same characteristics and manufacturing method for the same
AssigneeNEC Corporation
InventorNaoki Kasai
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Abstract
In a method of manufacturing a semiconductor memory device, a lower electrode film is formed on a semiconductor substrate via an interlayer insulating film. A ferroelectric film is formed on the lower electrode layer while heating the lower electrode layer uniformly in the cell array region. An upper electrode film is formed on the ferroelectric film. Ferroelectric capacitors are formed in a memory cell array region. Each of the ferroelectric capacitors includes the lower electrode film, the ferroelectric film and the upper electrode film.
Claims15
A semiconductor memory device having a memory cell array region, a peripheral circuit region and a connection region between said memory cell array region and said peripheral circuit region, comprising:
- ferroelectric capacitors formed on a semiconductor substrate via an interlayer insulating film in said memory cell array region;
- and
- conductive films formed on said interlayer insulating film in said connection regions
- conductive routes passing through said interlayer insulating film in said connection region, each conductive route being connected with said conductive films and said semiconductor substrate, and
- wherein both said conductive films and said conductive routes in said connection region are dummy structures.
A semiconductor memory device having a memory cell array region, a peripheral circuit region and a connection region between said memory cell array region and said peripheral circuit region, comprising:
- ferroelectric capacitors formed on a semiconductor substrate via an interlayer insulating film in said memory cell array region;
- and
- conductive films formed on said interlayer insulating film in said connection region,
- wherein said conductive films are connected with said semiconductor substrate via conductive routes passing through said interlayer insulating film, respectively, and
- wherein a layer for said conductive films is formed when a lower electrode layer for said ferroelectric capacitors is formed.
A semiconductor memory device having a memory cell array region, a peripheral circuit region and a connection region between said memory cell array region and said peripheral circuit region, comprising:
- ferroelectric capacitors formed on a semiconductor substrate via an interlayer insulating film in said memory cell array region;
- conductive films formed on said interlayer insulating film in said connection region;
- and additional conductive films formed in said peripheral circuit region,
- wherein said conductive films are connected with said semiconductor substrate via conductive routes passing through said interlayer insulating film, respectively, and
- wherein said additional conductive films are connected with any of said conductive routes in said connection region.
A semiconductor memory device having a memory cell array region, a peripheral circuit region and a connection region between said memory cell array region and said peripheral circuit region comprising:
- ferroelectric capacitors formed on a semiconductor substrate via an interlayer insulating film in said memory cell array region;
- and
- conductive films formed on said interlayer insulating film in said connection region,
- wherein said conductive films are connected with said semiconductor substrate via conductive routes passing through said interlayer insulating film, respectively, and
- wherein said semiconductor memory device is a logic circuit embedded non-volatile SRAM.
Dependencies are inferred from the claim text.