Real time defect source identification

A method of inspecting a semiconductor wafer, which method comprises:

• subjecting the wafer to a plurality of processing steps using a plurality of processing tools, each of the processing tools respectively associated with a unique tool identifier for identifying the processing tool;
• storing the tool identifiers;
• inspecting the wafer for possible defect sites using an inspection tool;
• determining a number of possible defect sites and a density of possible defect sites on the wafer to determine a defect level for the wafer;
• and
• generating a list of the tool identifiers using the inspection tool when the defect level is about equal to or greater than a predetermined defect level, the predetermined defect level comprising a predetermined number and/or density of possible defect sites on the wafer.

A computer-readable medium bearing instructions for inspecting a semiconductor wafer, which wafer has been subjected to a plurality of processing steps using a plurality of processing tools, each of the processing tools respectively associated with a unique tool identifier for identifying the processing tool, said instructions, when executed, being arranged to cause one or more processors to perform the steps of:

• receiving the tool identifiers;
• controlling a wafer inspection tool to inspect the wafer for defects;
• and
• generating a list of the tool identifiers.

A computer-readable medium bearing instructions for inspecting a semiconductor wafer, which wafer has been subjected to a plurality of processing steps using a plurality of processing tools, each of the processing tools respectively associated with a unique tool identifier for identifying the processing tool, said instructions, when executed, being arranged to cause one or more processors to perform the steps of:

• receiving the tool identifiers;
• controlling the wafer inspection tool to inspect the wafer for possible defect sites;
• determining a number of possible defect sites and a density of possible defect sites on the wafer to determine the defect level;
• and
• generating a list of the tool identifiers when the defect level is about equal to or greater than a predetermined defect level, the predetermined defect level comprising a predetermined number and/or density of possible defect sites on the wafer.