Detecting faults in dual port FIFO memories
AssigneeLSI Logic Corporation
InventorsJun Zhao, Mukesh Puri, V. Swamy Irrinki
Life of this patent
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Abstract
An efficient and reliable technique is disclosed for detecting faults which occur in FIFO's, including control faults which are specific to FIFO's, as well as faults common to conventional memories, such as interport faults and faults that occur in single port memories. The technique utilizes a sequence of read, write and control operations, thereby avoiding the need to directly observe internal values within the FIFO, such as the full and empty flag values and the shift register values.
Claims33
A method of testing for faults in a pointer-based FIFO capable of executing concurrent read and write operations to a plurality of memory locations, the memory locations consisting of a first plurality of memory locations and a second plurality of memory locations, comprising:
- (a) writing predetermined data values to the first plurality of memory locations;
- (b) writing predetermined data values to the second plurality of memory locations;
- (c) performing a series of read operations to the first plurality of memory locations, the series of read operations executing concurrently with a write operation in (b) and at a fixed number of memory addresses away from the concurrent write operation;
- and
- (d) determining whether each read operation in (c) returns a predetermined data value written during (a).
A method of testing for faults in a FIFO, the FIFO designed to prevent write operations if the FIFO is full, comprising:
- writing a test value to a test location in the FIFO;
- writing values into the FIFO until the FIFO is full;
- forming a complement of the test value;
- when the FIFO is full, initiating a write operation in the FIFO to replace the test value with the complement of the test value at the test location;
- and
- performing a read operation to determine whether the test location contains the test value or the complement.
A method of testing for faults in a FIFO, the FIFO configured to prevent read operations if the FIFO is empty, comprising:
- (a) writing a test value to a first test address in the FIFO;
- (b) writing the complement of the test value to a second test address after (a), wherein the second test address located one address behind the first test address;
- (c) reading the value of the second test address, wherein reading the value of the second test address empties the FIFO;
- (d) initiating a read operation at the first test address after (c);
- and
- (e) determining whether the FIFO executed the read operation in (d).
A method of testing for faults in a FIFO, the FIFO including a write enable input signal that is asserted to permit write operations, comprising:
- writing a test value to a test location in the FIFO, with the write enable signal asserted;
- forming a complement of the test value;
- initiating a write operation of the complement at one address higher than the test location, with the write enable signal deasserted;
- performing a first read operation at the test location;
- after the first read operation, performing a second read operation;
- and
- determining whether the FIFO executed the second read operation.
A method of testing for faults in a pointer-based FIFO capable of relocating a read pointer in response to a retransmit command, comprising:
- (a) writing a first test value to a first test location in the FIFO;
- (b) complementing the test value to create a second test value;
- (c) writing the second test value to a second test location in the FIFO after (a);
- (d) reading the first test location after (a);
- (e) reading the second test location after (c);
- (f) issuing a retransmit command to the FIFO after (d) and (e);
- (g) reading the first test location after (f);
- and
- (h) based on the result of (g), determining whether the FIFO relocated the read pointer in response to the retransmit command.
A method of testing for faults in a pointer-based FIFO capable of relocating a read pointer and a write pointer in response to a reset command, comprising:
- (a) writing a first test value to a first test location in the FIFO;
- (b) complementing the test value to create a second test value;
- (c) writing the second test value to a second test location in the FIFO after (a);
- (d) reading the first test location after (a);
- (e) reading the second test location after (c);
- (f) sending a reset command to the FIFO after (d);
- (g) writing the second test value to the first test location after (f);
- (h) reading the first test location after (g);
- and
- (i) based on the result of (h), determining whether the FIFO relocated a pointer in response to the reset command.
Dependencies are inferred from the claim text.