Field programmable network processor and method for customizing a network processor

A network processor comprising:

• a plurality of standard cells, the plurality of standard cells comprising common logic;
• a plurality of FPGA cells, the plurality of FPGA cells comprising high risk logic;
• and
• a processor first bus and two peripheral buses coupled to a portion of the standard cells and portion of the FPGA cells, wherein the FPGA cells coupled to the first bus comprise an accelerator function and a second function;
• wherein the FPGA cells coupled to one of the two peripheral buses are interfaces;
• wherein the FPGA cells coupled to the other of the two peripheral buses are a third function and a fourth function;
• wherein the plurality of cells each can provide a specified function based upon field programming techniques to allow for customization of the network processor.

A method for customizing a network processor;

• comprising the steps of:
• (a) providing at least one field programmable gate array (FPGA) cell and a plurality of standard cells within the network processor wherein said at least one FPGA comprises high risk logic and said plurality of standard cells comprise common logic;
• (b) providing a custom logic file for a vendor of the network processor by a customer of the network processor wherein step (b) further comprises (b1) providing a verification module within the custom logic file;
• and
• (c) programming the at least one FPGA cell by the vendor based upon the custom logic file to provide a customized network processor;
• and
• d verifying the customized network processor based upon the verification module.