Pixel structure for an active matrix OLED

A pixel structure for an active matrix OLED, comprising:

• a first switching device having a control terminal coupled to a first scan line and a first terminal coupled to a data line;
• a first P-type transistor having a drain terminal and a gate terminal coupled to each other and a source terminal coupled to a voltage source, wherein the drain terminal of the first P-type transistor is coupled to a second terminal of the first switch transistor;
• a second switching device having a first terminal coupled to a gate terminal of the first P-type transistor, and a control terminal coupled to a second scan line;
• a second P-type transistor having a source terminal coupled to the voltage source;
• a dummy transistor having a source terminal and a drain terminal coupled to a second terminal of the second switching transistor and the gate terminal of the second P-type transistor respectively, and a gate terminal coupled to a compensation scan line, wherein the source terminal and the drain terminal of the dummy transistor are coupled to each other, the dummy transistor is half the size of the second switching transistor, the compensation scan line is activated when the second scan line is deactivated and the compensation scan line is deactivated when the second scan line is activated;
• a storage capacitor coupled between the voltage source and a gate terminal of the second P-type transistor;
• and
• an OLED having an anode coupled to a drain terminal of the second P-type transistor, and a cathode coupled to ground.

A pixel structure for an active matrix OLED, comprising:

• a first switching device having a control terminal coupled to a first scan line and a first terminal coupled to a data line;
• a first P-type transistor having a drain terminal and a gate terminal coupled to each other and a source terminal coupled to a voltage source, wherein the drain terminal of the first P-type transistor is coupled to a second terminal of the first switch transistor;
• a second switching device having a first terminal coupled to a gate terminal of the first P-type transistor and a control terminal coupled to a second scan line;
• a third switching transistor having two terminals coupled to the first terminal and the second terminal of the second switching transistor respectively, and a control terminal coupled to a compensation scan line, wherein the second and third switching transistors construct a CMOS switching device and the compensation scan line is activated when the second scan line is deactivated and the compensation scan line is deactivated when the second scan line is activated;
• a second P-type transistor having a source terminal coupled to the voltage source and a gate terminal coupled to a second terminal of the second switch transistor;
• a storage capacitor coupled between the voltage source and the gate terminal of the second P-type transistor;
• and
• an OLED having an anode coupled to a drain terminal of the second P-type transistor, and a cathode coupled to ground.