System and method for accessing a CMOS device in a configuration and power management system

Abstract

Described is a system and method by which data accesses to information related to a CMOS device are synchronized. A special “operation region” is provided through which the information is accessed. More specifically, a “CMOS Operation Region” is enabled through which CMOS information is read or written. When an AML interpreter performs a read or write instruction to the CMOS operation region, the ACPI system passes that instruction to a process for handling that operation region, in this example the system kernel. The process may include mechanisms that synchronize accesses to the Operation Region so that a load or store operation is fully completed prior to allowing a subsequent load or store operation. In this way, the information associated with the CMOS that is loaded in memory is not corrupted by asynchronous accesses.

Dependencies are inferred from the claim text.