Method and apparatus for controlling system timing with use of a master timer
AssigneesTexas Instruments Incorporated, Koninklijke Philips Electronics N.V.
InventorsJohn G. McDonough, Tien Q. Nguyen
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Abstract
Unique methods and apparatus for maintaining timing in spread spectrum communications are described. One method involves the steps of repeatedly incrementing an N-bit master binary counter at a chip rate to provide a count that rolls over at or near the end of a nominal zero-offset pseudorandom noise (PN) sequence having a length of 2N. The method includes the further steps of, for each counter of a plurality of N-bit slave binary counters, repeatedly incrementing an N-bit slave binary counter at the chip rate to generate a count that is out-of-phase with the count associated with the N-bit master binary counter by a base station offset value and a path delay value.
Claims10
A method for use in maintaining timing in spread spectrum communications, the method comprising:
- counting at a chip rate to provide a first count that rolls over at or near the end of a nominal zero-offset pseudorandom noise (PN) sequence;
- and
- during the step of counting at the chip rate to provide the first count, counting a the chip rate to provide a second count that is out-of-phase with the first count by a base station offset value and a path delay value.
A method for use in maintaining timing in spread spectrum communications, the method comprising:
- counting at a chip rate to provide a first count that rolls over at or near the end of a nominal zero-offset pseudorandom noise (PN) sequence;
- counting at the chip rate to provide a second count that is out-of-phase with the first count by a first base station offset value and a first path delay value;
- and
- counting at the chip rate to provide a third count that is out-of-phase with the first count by a second base station offset value and a second path delay value.
A method for use in maintaining timing for spread spectrum communications, the method comprising:
- repeatedly incrementing an N-bit master binary counter at a chip rate to provide a count that rolls over at or near the end of a nominal zero-offset pseudorandom noise (PN) sequence having a length of 2N;
- and
- for each counter of a plurality of N-bit slave binary counters:
- repeatedly incrementing the N-bit slave binary counter at the chip rate to generate a count that may be out-of-phase with the count associated with the N-bit master binary counter by a base station offset value and a path delay value.
A method for use in maintaining timing for spread spectrum communications, the method comprising:
- repeatedly incrementing an N-bit master binary counter at a chip rate to provide a count that rolls over at or near the end of a nominal zero-offset pseudorandom noise (PN) sequence having a length of 2N;
- and
- for each counter of a plurality of N-bit slave binary counters:
- loading the N-bit slave binary counter with a counter value derived from an output of the N-bit master binary counter;
- and
- repeatedly incrementing the N-bit slave binary counter at the chip rate to generate a count that may be out-of-phase with the count associated with the N-bit master binary counter by a base station offset value and a path delay value.
A method for use in maintaining timing for spread spectrum communications, the method comprising:
- repeatedly incrementing an N-bit master binary counter at a chip rate to provide a count that rolls over at or near the end of a nominal zero-offset pseudorandom noise (PN) sequence having a length of 2N;
- and
- for each counter of a plurality of N-bit slave binary counters:
- receiving offset information from a base station to provide a base station offset value;
- and
- repeatedly incrementing the N-bit slave binary counter at the chip rate to generate a count that may be out-of-phase with the count associated with the N-bit master binary counter by the base station offset value and a path delay value.
Dependencies are inferred from the claim text.