Network channel receiver architecture
AssigneeIntel Corporation
InventorsDean S. Susnow, Richard D. Reohr, Jr.
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AssigneeIntel Corporation
InventorsDean S. Susnow, Richard D. Reohr, Jr.
Estimating the term…
A network interface controller connects a processing system to receive data from a network fabric through a serial link. The data on the link is clocked in a link clock domain that is different than the core clock domain of the network interface controller. A physical interface operates in the link clock domain. It has a pipeline architecture partitioned into an input register block, a decoder block and a link synchronization manager. The input register block receives the link clock and the data on the link, and transfers the data into the link clock domain. The decoder block has dual cascaded 8B/10B decoders receiving and decoding the data transferred by the input register block. The link synchronization manager manages the synchronization of the serial link according to the decoded data. An elastic buffer is connected to the output of the link synchronization manager. It is configured to output the decoded data in the core clock domain.
A network interface controller to receive data from a network fabric through a serial link, the data on the link to be clocked in a link clock domain different than a core clock domain of said network interface controller, comprising:
A network interface controller to receive data from a network fabric through a serial link, the data on the link to be received and clocked in a link clock domain different than a transmit cock domain of a transmitter in said network interface controller, the network interface controller comprising:
A SERDES detection logic in a first clock domain to indicate whether or not a clock signal is present for a network link, said network link having a link clock domain different than said first clock domain, comprising:
Dependencies are inferred from the claim text.