Voltage detection level correction circuit and semiconductor device

A voltage detection level correction circuit, comprising:

• a power supply voltage detection circuit having a reference potential generation circuit for generating a constant reference potential that is independent of a power supply voltage, a divided voltage potential generation circuit for generating a divided voltage potential gained by dividing said power supply voltage according to a constant ratio and a differential amplification circuit for comparing said reference potential with said divided voltage potential and for outputting an output signal in case that said divided potential is lower than said reference potential;
• a non-volatile memory which stores correction data for correcting said divided voltage potential and which is converted to an inactive condition in response to said output signal of said differential amplification circuit;
• a data latch circuit for storing said correction data read out from said non-volatile memory;
• and
• a control circuit for reading out said correction data from said non-volatile memory and for making said correction data to be latched in said data latch circuit, wherein
• said divided voltage potential generation circuit comprises a circuit which has circuit elements for varying said divided voltage potential and which receives said correction data from said data latch circuit for switching of said circuit elements.

A voltage detection level correction circuit, comprising:

• a power supply voltage detection circuit having a reference potential generation circuit for generating a constant reference potential that is independent of a power supply voltage, a divided voltage potential generation circuit for generating a divided voltage potential gained by dividing said power supply voltage according to a constant ratio and a differential amplification circuit for comparing said reference potential with said divided voltage potential and for outputting an output signal in case that said divided potential is lower than said reference potential;
• a non-volatile memory which stores correction data for adjusting the sensitivity of said differential amplification circuit and which is converted to an inactive condition in response to said output signal of said differential amplification circuit;
• a data latch circuit for storing said correction data read out from said non-volatile memory;
• and
• a control circuit for reading out said correction data from said non-volatile memory and for making said correction data to be latched in said data latch circuit, wherein
• said differential amplification circuit comprises a circuit which has circuit elements for adjusting the sensitivity of said differential amplification circuit so that a voltage detection level of said power supply voltage detection circuit can be corrected and which receives said correction data from said data latch circuit for switching of said circuit elements.

A voltage detection level correction circuit, comprising:

• a power supply voltage detection circuit having a reference potential generation circuit for generating a constant reference potential that is independent of a power supply voltage, a divided voltage potential generation circuit for generating a divided voltage potential gained by dividing said power supply voltage according to a constant ratio and a differential amplification circuit for comparing said reference potential with said divided voltage potential and for outputting an output signal in case that said divided potential is lower than said reference potential;
• a non-volatile memory which stores correction data for correcting said reference potential, correction data for correcting said divided voltage potential or correction data for adjusting the sensitivity of said differential amplification circuit and which is converted to an inactive condition in response to said output signal of said differential amplification circuit;
• a data latch circuit for storing said correction data read out from said non-volatile memory;
• and
• a control circuit for reading out said correction data from said non-volatile memory and for making said correction data to be latched in said data latch circuit, wherein
• at least two circuits from among said reference potential generation circuit, said divided voltage potential generation circuit and said differential amplifier comprise respective circuits which have circuit elements for varying said reference potential, said divided voltage potential or the sensitivity of said differential amplification circuit and which receives said correction data from said data latch circuit for switching of said circuit elements.