Nonvolatile semiconductor memory apparatus

A nonvolatile memory apparatus comprising:

• a processing unit;
• a plurality of nonvolatile memories;
• and
• an input/output terminal,
• wherein each of said nonvolatile memories has a terminal used for data input and for data output,
• wherein said terminal of each of said memories and said input/output terminal are coupled to each other by a bus,
• wherein said processing unit is capable of designating an erase operation to each of said nonvolatile memories for erasing data stored therein,
• wherein said erase operation includes a threshold voltage moving operation and a verify operation,
• wherein said threshold voltage moving operation is that in which a threshold voltage of a memory cell in a respective nonvolatile memory is moved to a threshold voltage range indicating an erase state,
• wherein said verify operation determines whether the threshold voltage moving operation of said memory cell to said erase state is completed,
• wherein said nonvolatile memory repeats said erase operation when the threshold voltage moving operation of said memory cell to that of an erase state is not yet completed, the erase operation of said nonvolatile memory ending when the threshold voltage of said memory cell is indicative of said erase state,
• wherein, for selective erasure, said processing unit designates said erase operation to a first nonvolatile memory of said nonvolatile memories for performing said erase operation in said first nonvolatile memory,
• wherein said first nonvolatile memory is capable of freeing said terminal when performing said erase operation and is capable of outputting a signal for indicating that said erase operation is being performed,
• wherein said processing unit is capable of inputting data from outside of said nonvolatile memory apparatus via said input/output terminal when said erase operation is being performed in said first nonvolatile memory, and
• wherein said processing unit is capable of outputting data to outside of said nonvolatile memory apparatus via said input/output terminal when said erase operation is being performed in said first nonvolatile memory.

A nonvolatile memory apparatus comprising:

• a plurality of nonvolatile memories;
• a control unit;
• and
• a bus,
• wherein each of said nonvolatile memories includes a terminal used for data input and for data output, said terminal of each of said nonvolatile memories are coupled to each other by said bus, and a plurality of memory cells, each of which has a threshold voltage within one of a plurality of threshold voltage ranges,
• wherein each of said nonvolatile memories operates a first operation including a threshold voltage moving operation and a verify operation,
• wherein said threshold voltage moving operation is that in which said threshold voltage of a respective memory cell is moved to a first threshold voltage range in said plurality of threshold voltage ranges,
• wherein said verify operation determines whether the threshold voltage moving operation of said memory cell to said first threshold voltage range is completed,
• wherein said nonvolatile memory repeats said threshold voltage moving operation and said verify operation when the threshold voltage movement of that memory cell to said first threshold voltage range is not yet completed, said first operation of said nonvolatile memory ending when the threshold voltage of said memory cell is in the first threshold voltage range, and
• wherein said control unit is capable of accessing other ones of said nonvolatile memories via said bus when said first operation is being performed in one nonvolatile memory thereof, after specifying said first operation to said one nonvolatile memory.