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AssigneeSony Corporation
InventorShinichi Matsushita
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An image processing apparatus and method, and a display apparatus capable of preventing field tearing caused by memory overrun even when performing a read operation and a write operation of input/output images with respect to a single image memory, wherein a system microcomputer (MC) is used for generating and supplying output delay data for delaying an image output timing based on the write speed to the image memory, the read speed from the image memory, and the read area so that the timing of access to the read end address address and the timing for performing a write operation to the same address match and of a scan converter for receiving the output delay data supplied by the system MC and delaying the image output timing so that the timing of access to the read end address and the timing for performing a write operation to the same address match.
An image processing apparatus having a single image memory for performing simultaneously read and write operations in parallel of input images and for outputting enlarged images, reduced images, or shifted images, comprising:
An image processing method for performing simultaneously read and write operations of input images and for outputting enlarged images, reduced images, or shifted images, comprising:
Dependencies are inferred from the claim text.